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Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3368.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368.dtsi8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index f52ced6091db..9c24de1ba43c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -76,7 +76,6 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
-
#cooling-cells = <2>; /* min followed by max */
};
@@ -85,6 +84,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_l2: cpu@2 {
@@ -92,6 +92,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x2>;
enable-method = "psci";
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_l3: cpu@3 {
@@ -99,6 +100,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x3>;
enable-method = "psci";
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_b0: cpu@100 {
@@ -106,7 +108,6 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
-
#cooling-cells = <2>; /* min followed by max */
};
@@ -115,6 +116,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x101>;
enable-method = "psci";
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_b2: cpu@102 {
@@ -122,6 +124,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x102>;
enable-method = "psci";
+ #cooling-cells = <2>; /* min followed by max */
};
cpu_b3: cpu@103 {
@@ -129,6 +132,7 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x0 0x103>;
enable-method = "psci";
+ #cooling-cells = <2>; /* min followed by max */
};
};