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-rw-r--r--Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml6
-rw-r--r--Documentation/devicetree/bindings/mfd/syscon.yaml4
2 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
index 65018a019e1d..3bfdd33702ad 100644
--- a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml
@@ -32,9 +32,15 @@ properties:
clocks:
maxItems: 1
+ clock-names:
+ const: osc
+
"#clock-cells":
const: 0
+ clock-output-names:
+ const: pmic_clk
+
# The BD718x7 supports two different HW states as reset target states. States
# are called as SNVS and READY. At READY state all the PMIC power outputs go
# down and OTP is reload. At the SNVS state all other logic and external
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 8f4764a9ed45..f14ae6da0068 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -44,6 +44,10 @@ properties:
- hisilicon,peri-subctrl
- microchip,sparx5-cpu-syscon
- mstar,msc313-pmsleep
+ - rockchip,px30-qos
+ - rockchip,rk3066-qos
+ - rockchip,rk3288-qos
+ - rockchip,rk3399-qos
- samsung,exynos3-sysreg
- samsung,exynos4-sysreg
- samsung,exynos5-sysreg