diff options
-rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra.c | 18 | ||||
-rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra.h | 4 | ||||
-rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra114.c | 4 | ||||
-rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra124.c | 4 | ||||
-rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra194.c | 4 | ||||
-rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra20.c | 6 | ||||
-rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra210.c | 60 | ||||
-rw-r--r-- | drivers/pinctrl/tegra/pinctrl-tegra30.c | 4 |
8 files changed, 57 insertions, 47 deletions
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c index 76e88c4470d3..c7fc8ecca5b4 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c @@ -621,10 +621,20 @@ static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx) for (i = 0; i < pmx->soc->ngroups; ++i) { g = &pmx->soc->groups[i]; - if (g->parked_bit >= 0) { - val = pmx_readl(pmx, g->mux_bank, g->mux_reg); - val &= ~(1 << g->parked_bit); - pmx_writel(pmx, val, g->mux_bank, g->mux_reg); + if (g->parked_bitmask > 0) { + unsigned int bank, reg; + + if (g->mux_reg != -1) { + bank = g->mux_bank; + reg = g->mux_reg; + } else { + bank = g->drv_bank; + reg = g->drv_reg; + } + + val = pmx_readl(pmx, bank, reg); + val &= ~g->parked_bitmask; + pmx_writel(pmx, val, bank, reg); } } } diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h index 82cd947e5171..719bdcba269e 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.h +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h @@ -104,7 +104,6 @@ struct tegra_function { * @tri_reg: Tri-state register offset. * @tri_bank: Tri-state register bank. * @tri_bit: Tri-state register bit. - * @parked_bit: Parked register bit. -1 if unsupported. * @einput_bit: Enable-input register bit. * @odrain_bit: Open-drain register bit. * @lock_bit: Lock register bit. @@ -126,6 +125,7 @@ struct tegra_function { * @slwf_bit: Slew Falling register bit. * @slwf_width: Slew Falling field width. * @drvtype_bit: Drive type register bit. + * @parked_bitmask: Parked register mask. 0 if unsupported. * * -1 in a *_reg field means that feature is unsupported for this group. * *_bank and *_reg values are irrelevant when *_reg is -1. @@ -154,7 +154,6 @@ struct tegra_pingroup { s32 mux_bit:6; s32 pupd_bit:6; s32 tri_bit:6; - s32 parked_bit:6; s32 einput_bit:6; s32 odrain_bit:6; s32 lock_bit:6; @@ -172,6 +171,7 @@ struct tegra_pingroup { s32 drvup_width:6; s32 slwr_width:6; s32 slwf_width:6; + u32 parked_bitmask; }; /** diff --git a/drivers/pinctrl/tegra/pinctrl-tegra114.c b/drivers/pinctrl/tegra/pinctrl-tegra114.c index 229a80e2709e..09ac945f795b 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra114.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra114.c @@ -1580,8 +1580,8 @@ static struct tegra_function tegra114_functions[] = { .lock_bit = 7, \ .ioreset_bit = PINGROUP_BIT_##ior(8), \ .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \ - .parked_bit = -1, \ .drv_reg = -1, \ + .parked_bitmask = 0, \ } #define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, \ @@ -1601,7 +1601,6 @@ static struct tegra_function tegra114_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_bit = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ @@ -1614,6 +1613,7 @@ static struct tegra_function tegra114_functions[] = { .slwf_bit = slwf_b, \ .slwf_width = slwf_w, \ .drvtype_bit = PINGROUP_BIT_##drvtype(6), \ + .parked_bitmask = 0, \ } static const struct tegra_pingroup tegra114_groups[] = { diff --git a/drivers/pinctrl/tegra/pinctrl-tegra124.c b/drivers/pinctrl/tegra/pinctrl-tegra124.c index 98f4d3d85879..da290787e703 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra124.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra124.c @@ -1749,8 +1749,8 @@ static struct tegra_function tegra124_functions[] = { .lock_bit = 7, \ .ioreset_bit = PINGROUP_BIT_##ior(8), \ .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \ - .parked_bit = -1, \ .drv_reg = -1, \ + .parked_bitmask = 0, \ } #define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, \ @@ -1770,7 +1770,6 @@ static struct tegra_function tegra124_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_bit = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ @@ -1783,6 +1782,7 @@ static struct tegra_function tegra124_functions[] = { .slwf_bit = slwf_b, \ .slwf_width = slwf_w, \ .drvtype_bit = PINGROUP_BIT_##drvtype(6), \ + .parked_bitmask = 0, \ } #define MIPI_PAD_CTRL_PINGROUP(pg_name, r, b, f0, f1) \ diff --git a/drivers/pinctrl/tegra/pinctrl-tegra194.c b/drivers/pinctrl/tegra/pinctrl-tegra194.c index 957ef198850a..daf44cf240c9 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra194.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra194.c @@ -87,7 +87,6 @@ static struct tegra_function tegra194_functions[] = { .lpmd_bit = -1, \ .lock_bit = -1, \ .hsm_bit = -1, \ - .parked_bit = -1, \ .mux_bank = bank, \ .mux_bit = 0, \ .pupd_reg = ((r)), \ @@ -100,7 +99,8 @@ static struct tegra_function tegra194_functions[] = { .odrain_bit = e_od, \ .schmitt_bit = schmitt_b, \ .drvtype_bit = 13, \ - .drv_reg = -1 + .drv_reg = -1, \ + .parked_bitmask = 0 #define drive_pex_l5_clkreq_n_pgg0 \ DRV_PINGROUP_ENTRY_Y(0x14004, 12, 5, 20, 5, -1, -1, -1, -1, 0) diff --git a/drivers/pinctrl/tegra/pinctrl-tegra20.c b/drivers/pinctrl/tegra/pinctrl-tegra20.c index 1fc82a9576e0..9a8df1e43179 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra20.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra20.c @@ -1997,13 +1997,13 @@ static struct tegra_function tegra20_functions[] = { .tri_reg = ((tri_r) - TRISTATE_REG_A), \ .tri_bank = 0, \ .tri_bit = tri_b, \ - .parked_bit = -1, \ .einput_bit = -1, \ .odrain_bit = -1, \ .lock_bit = -1, \ .ioreset_bit = -1, \ .rcv_sel_bit = -1, \ .drv_reg = -1, \ + .parked_bitmask = 0, \ } /* Pin groups with only pull up and pull down control */ @@ -2017,7 +2017,7 @@ static struct tegra_function tegra20_functions[] = { .pupd_bank = 2, \ .pupd_bit = pupd_b, \ .drv_reg = -1, \ - .parked_bit = -1, \ + .parked_bitmask = 0, \ } /* Pin groups for drive strength registers (configurable version) */ @@ -2033,7 +2033,7 @@ static struct tegra_function tegra20_functions[] = { .tri_reg = -1, \ .drv_reg = ((r) - PINGROUP_REG_A), \ .drv_bank = 3, \ - .parked_bit = -1, \ + .parked_bitmask = 0, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ diff --git a/drivers/pinctrl/tegra/pinctrl-tegra210.c b/drivers/pinctrl/tegra/pinctrl-tegra210.c index 49f3b66473d8..4aeda04fbede 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra210.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra210.c @@ -1310,7 +1310,6 @@ static struct tegra_function tegra210_functions[] = { .lock_bit = 7, \ .ioreset_bit = -1, \ .rcv_sel_bit = PINGROUP_BIT_##e_io_hv(10), \ - .parked_bit = 5, \ .hsm_bit = PINGROUP_BIT_##hsm(9), \ .schmitt_bit = 12, \ .drvtype_bit = PINGROUP_BIT_##drvtype(13), \ @@ -1325,10 +1324,11 @@ static struct tegra_function tegra210_functions[] = { .slwr_width = slwr_w, \ .slwf_bit = slwf_b, \ .slwf_width = slwf_w, \ + .parked_bitmask = BIT(5), \ } -#define DRV_PINGROUP(pg_name, r, drvdn_b, drvdn_w, drvup_b, drvup_w, \ - slwr_b, slwr_w, slwf_b, slwf_w) \ +#define DRV_PINGROUP(pg_name, r, prk_mask, drvdn_b, drvdn_w, drvup_b, \ + drvup_w, slwr_b, slwr_w, slwf_b, slwf_w) \ { \ .name = "drive_" #pg_name, \ .pins = drive_##pg_name##_pins, \ @@ -1343,7 +1343,6 @@ static struct tegra_function tegra210_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_bit = -1, \ .hsm_bit = -1, \ .schmitt_bit = -1, \ .lpmd_bit = -1, \ @@ -1356,6 +1355,7 @@ static struct tegra_function tegra210_functions[] = { .slwf_bit = slwf_b, \ .slwf_width = slwf_w, \ .drvtype_bit = -1, \ + .parked_bitmask = prk_mask, \ } static const struct tegra_pingroup tegra210_groups[] = { @@ -1523,32 +1523,32 @@ static const struct tegra_pingroup tegra210_groups[] = { PINGROUP(pz4, SDMMC1, RSVD1, RSVD2, RSVD3, 0x328c, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1), PINGROUP(pz5, SOC, RSVD1, RSVD2, RSVD3, 0x3290, N, N, N, -1, -1, -1, -1, -1, -1, -1, -1, -1), - /* pg_name, r, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w */ - DRV_PINGROUP(pa6, 0x9c0, 12, 5, 20, 5, -1, -1, -1, -1), - DRV_PINGROUP(pcc7, 0x9c4, 12, 5, 20, 5, -1, -1, -1, -1), - DRV_PINGROUP(pe6, 0x9c8, 12, 5, 20, 5, -1, -1, -1, -1), - DRV_PINGROUP(pe7, 0x9cc, 12, 5, 20, 5, -1, -1, -1, -1), - DRV_PINGROUP(ph6, 0x9d0, 12, 5, 20, 5, -1, -1, -1, -1), - DRV_PINGROUP(pk0, 0x9d4, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pk1, 0x9d8, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pk2, 0x9dc, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pk3, 0x9e0, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pk4, 0x9e4, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pk5, 0x9e8, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pk6, 0x9ec, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pk7, 0x9f0, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pl0, 0x9f4, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pl1, 0x9f8, -1, -1, -1, -1, 28, 2, 30, 2), - DRV_PINGROUP(pz0, 0x9fc, 12, 7, 20, 7, -1, -1, -1, -1), - DRV_PINGROUP(pz1, 0xa00, 12, 7, 20, 7, -1, -1, -1, -1), - DRV_PINGROUP(pz2, 0xa04, 12, 7, 20, 7, -1, -1, -1, -1), - DRV_PINGROUP(pz3, 0xa08, 12, 7, 20, 7, -1, -1, -1, -1), - DRV_PINGROUP(pz4, 0xa0c, 12, 7, 20, 7, -1, -1, -1, -1), - DRV_PINGROUP(pz5, 0xa10, 12, 7, 20, 7, -1, -1, -1, -1), - DRV_PINGROUP(sdmmc1, 0xa98, 12, 7, 20, 7, 28, 2, 30, 2), - DRV_PINGROUP(sdmmc2, 0xa9c, 2, 6, 8, 6, 28, 2, 30, 2), - DRV_PINGROUP(sdmmc3, 0xab0, 12, 7, 20, 7, 28, 2, 30, 2), - DRV_PINGROUP(sdmmc4, 0xab4, 2, 6, 8, 6, 28, 2, 30, 2), + /* pg_name, r, prk_mask, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w */ + DRV_PINGROUP(pa6, 0x9c0, 0x0, 12, 5, 20, 5, -1, -1, -1, -1), + DRV_PINGROUP(pcc7, 0x9c4, 0x0, 12, 5, 20, 5, -1, -1, -1, -1), + DRV_PINGROUP(pe6, 0x9c8, 0x0, 12, 5, 20, 5, -1, -1, -1, -1), + DRV_PINGROUP(pe7, 0x9cc, 0x0, 12, 5, 20, 5, -1, -1, -1, -1), + DRV_PINGROUP(ph6, 0x9d0, 0x0, 12, 5, 20, 5, -1, -1, -1, -1), + DRV_PINGROUP(pk0, 0x9d4, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pk1, 0x9d8, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pk2, 0x9dc, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pk3, 0x9e0, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pk4, 0x9e4, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pk5, 0x9e8, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pk6, 0x9ec, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pk7, 0x9f0, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pl0, 0x9f4, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pl1, 0x9f8, 0x0, -1, -1, -1, -1, 28, 2, 30, 2), + DRV_PINGROUP(pz0, 0x9fc, 0x0, 12, 7, 20, 7, -1, -1, -1, -1), + DRV_PINGROUP(pz1, 0xa00, 0x0, 12, 7, 20, 7, -1, -1, -1, -1), + DRV_PINGROUP(pz2, 0xa04, 0x0, 12, 7, 20, 7, -1, -1, -1, -1), + DRV_PINGROUP(pz3, 0xa08, 0x0, 12, 7, 20, 7, -1, -1, -1, -1), + DRV_PINGROUP(pz4, 0xa0c, 0x0, 12, 7, 20, 7, -1, -1, -1, -1), + DRV_PINGROUP(pz5, 0xa10, 0x0, 12, 7, 20, 7, -1, -1, -1, -1), + DRV_PINGROUP(sdmmc1, 0xa98, 0x0, 12, 7, 20, 7, 28, 2, 30, 2), + DRV_PINGROUP(sdmmc2, 0xa9c, 0x7ffc000, 2, 6, 8, 6, 28, 2, 30, 2), + DRV_PINGROUP(sdmmc3, 0xab0, 0x0, 12, 7, 20, 7, 28, 2, 30, 2), + DRV_PINGROUP(sdmmc4, 0xab4, 0x7ffc000, 2, 6, 8, 6, 28, 2, 30, 2), }; static const struct tegra_pinctrl_soc_data tegra210_pinctrl = { diff --git a/drivers/pinctrl/tegra/pinctrl-tegra30.c b/drivers/pinctrl/tegra/pinctrl-tegra30.c index 10e617003e9c..10e638198109 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra30.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra30.c @@ -2141,8 +2141,8 @@ static struct tegra_function tegra30_functions[] = { .lock_bit = 7, \ .ioreset_bit = PINGROUP_BIT_##ior(8), \ .rcv_sel_bit = -1, \ - .parked_bit = -1, \ .drv_reg = -1, \ + .parked_bitmask = 0, \ } #define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, \ @@ -2162,7 +2162,6 @@ static struct tegra_function tegra30_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_bit = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ @@ -2175,6 +2174,7 @@ static struct tegra_function tegra30_functions[] = { .slwf_bit = slwf_b, \ .slwf_width = slwf_w, \ .drvtype_bit = -1, \ + .parked_bitmask = 0, \ } static const struct tegra_pingroup tegra30_groups[] = { |