diff options
| -rw-r--r-- | arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi index 630ed4a4ef1b..b4e51925dfd2 100644 --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi @@ -89,6 +89,86 @@ <0x0 0x780A0000 0x0 0x20000>, /* GIC CPU */ <0x0 0x780C0000 0x0 0x10000>, /* GIC VCPU Control */ <0x0 0x780E0000 0x0 0x20000>; /* GIC VCPU */ + v2m0: v2m@0x00000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x0 0x0 0x1000>; + }; + v2m1: v2m@0x10000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x10000 0x0 0x1000>; + }; + v2m2: v2m@0x20000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x20000 0x0 0x1000>; + }; + v2m3: v2m@0x30000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x30000 0x0 0x1000>; + }; + v2m4: v2m@0x40000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x40000 0x0 0x1000>; + }; + v2m5: v2m@0x50000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x50000 0x0 0x1000>; + }; + v2m6: v2m@0x60000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x60000 0x0 0x1000>; + }; + v2m7: v2m@0x70000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x70000 0x0 0x1000>; + }; + v2m8: v2m@0x80000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x80000 0x0 0x1000>; + }; + v2m9: v2m@0x90000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x90000 0x0 0x1000>; + }; + v2m10: v2m@0xA0000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0xA0000 0x0 0x1000>; + }; + v2m11: v2m@0xB0000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0xB0000 0x0 0x1000>; + }; + v2m12: v2m@0xC0000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0xC0000 0x0 0x1000>; + }; + v2m13: v2m@0xD0000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0xD0000 0x0 0x1000>; + }; + v2m14: v2m@0xE0000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0xE0000 0x0 0x1000>; + }; + v2m15: v2m@0xF0000 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0xF0000 0x0 0x1000>; + }; }; pmu { |