summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--drivers/irqchip/irq-mips-gic.c19
-rw-r--r--include/linux/irqchip/mips-gic.h5
2 files changed, 6 insertions, 18 deletions
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 987289558024..14a1682f399e 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -92,13 +92,6 @@ static inline void gic_update_bits(unsigned int reg, unsigned long mask,
gic_write(reg, regval);
}
-static inline void gic_set_trigger(unsigned int intr, unsigned int trig)
-{
- gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_TRIGGER) +
- GIC_INTR_OFS(intr), 1ul << GIC_INTR_BIT(intr),
- (unsigned long)trig << GIC_INTR_BIT(intr));
-}
-
static inline void gic_set_dual_edge(unsigned int intr, unsigned int dual)
{
gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_DUAL) + GIC_INTR_OFS(intr),
@@ -266,32 +259,32 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
switch (type & IRQ_TYPE_SENSE_MASK) {
case IRQ_TYPE_EDGE_FALLING:
change_gic_pol(irq, GIC_POL_FALLING_EDGE);
- gic_set_trigger(irq, GIC_TRIG_EDGE);
+ change_gic_trig(irq, GIC_TRIG_EDGE);
gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
is_edge = true;
break;
case IRQ_TYPE_EDGE_RISING:
change_gic_pol(irq, GIC_POL_RISING_EDGE);
- gic_set_trigger(irq, GIC_TRIG_EDGE);
+ change_gic_trig(irq, GIC_TRIG_EDGE);
gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
is_edge = true;
break;
case IRQ_TYPE_EDGE_BOTH:
/* polarity is irrelevant in this case */
- gic_set_trigger(irq, GIC_TRIG_EDGE);
+ change_gic_trig(irq, GIC_TRIG_EDGE);
gic_set_dual_edge(irq, GIC_TRIG_DUAL_ENABLE);
is_edge = true;
break;
case IRQ_TYPE_LEVEL_LOW:
change_gic_pol(irq, GIC_POL_ACTIVE_LOW);
- gic_set_trigger(irq, GIC_TRIG_LEVEL);
+ change_gic_trig(irq, GIC_TRIG_LEVEL);
gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
is_edge = false;
break;
case IRQ_TYPE_LEVEL_HIGH:
default:
change_gic_pol(irq, GIC_POL_ACTIVE_HIGH);
- gic_set_trigger(irq, GIC_TRIG_LEVEL);
+ change_gic_trig(irq, GIC_TRIG_LEVEL);
gic_set_dual_edge(irq, GIC_TRIG_DUAL_DISABLE);
is_edge = false;
break;
@@ -458,7 +451,7 @@ static void __init gic_basic_init(void)
/* Setup defaults */
for (i = 0; i < gic_shared_intrs; i++) {
change_gic_pol(i, GIC_POL_ACTIVE_HIGH);
- gic_set_trigger(i, GIC_TRIG_LEVEL);
+ change_gic_trig(i, GIC_TRIG_LEVEL);
write_gic_rmask(BIT(i));
}
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index 960e49a64e7a..2e9f0c43d425 100644
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -14,8 +14,6 @@
#define GIC_MAX_INTRS 256
/* Constants */
-#define GIC_TRIG_EDGE 1
-#define GIC_TRIG_LEVEL 0
#define GIC_TRIG_DUAL_ENABLE 1
#define GIC_TRIG_DUAL_DISABLE 0
@@ -50,9 +48,6 @@
})
#define GIC_INTR_BIT(intr) ((intr) % (mips_cm_is64 ? 64 : 32))
-/* Triggering : Reset Value is always 0 */
-#define GIC_SH_SET_TRIGGER_OFS 0x0180
-
/* Dual edge triggering : Reset Value is always 0 */
#define GIC_SH_SET_DUAL_OFS 0x0200