diff options
-rw-r--r-- | drivers/clk/mediatek/Kconfig | 2 | ||||
-rw-r--r-- | drivers/clk/mediatek/clk-apmixed.c | 3 | ||||
-rw-r--r-- | drivers/clk/mediatek/clk-cpumux.c | 3 | ||||
-rw-r--r-- | drivers/clk/mediatek/clk-gate.c | 8 | ||||
-rw-r--r-- | drivers/clk/mediatek/clk-mtk.c | 8 | ||||
-rw-r--r-- | drivers/clk/mediatek/clk-mux.c | 4 | ||||
-rw-r--r-- | drivers/clk/mediatek/clk-pll.c | 4 | ||||
-rw-r--r-- | drivers/clk/mediatek/reset.c | 2 |
8 files changed, 33 insertions, 1 deletions
diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig index 4654ec336fc1..8eb9c8379f9a 100644 --- a/drivers/clk/mediatek/Kconfig +++ b/drivers/clk/mediatek/Kconfig @@ -6,7 +6,7 @@ menu "Clock driver for MediaTek SoC" depends on ARCH_MEDIATEK || COMPILE_TEST config COMMON_CLK_MEDIATEK - bool + tristate select RESET_CONTROLLER help MediaTek SoCs' clock support. diff --git a/drivers/clk/mediatek/clk-apmixed.c b/drivers/clk/mediatek/clk-apmixed.c index 258d128370f2..caa9119413f1 100644 --- a/drivers/clk/mediatek/clk-apmixed.c +++ b/drivers/clk/mediatek/clk-apmixed.c @@ -5,6 +5,7 @@ */ #include <linux/delay.h> +#include <linux/module.h> #include <linux/of_address.h> #include <linux/slab.h> @@ -97,3 +98,5 @@ struct clk * __init mtk_clk_register_ref2usb_tx(const char *name, return clk; } + +MODULE_LICENSE("GPL"); diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c index 61eeae4e60fb..e188018bc906 100644 --- a/drivers/clk/mediatek/clk-cpumux.c +++ b/drivers/clk/mediatek/clk-cpumux.c @@ -6,6 +6,7 @@ #include <linux/clk-provider.h> #include <linux/mfd/syscon.h> +#include <linux/module.h> #include <linux/slab.h> #include "clk-mtk.h" @@ -106,3 +107,5 @@ int mtk_clk_register_cpumuxes(struct device_node *node, return 0; } + +MODULE_LICENSE("GPL"); diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c index a35cf0b22150..b02d2f74dd0d 100644 --- a/drivers/clk/mediatek/clk-gate.c +++ b/drivers/clk/mediatek/clk-gate.c @@ -11,6 +11,7 @@ #include <linux/slab.h> #include <linux/delay.h> #include <linux/clkdev.h> +#include <linux/module.h> #include "clk-mtk.h" #include "clk-gate.h" @@ -122,24 +123,28 @@ const struct clk_ops mtk_clk_gate_ops_setclr = { .enable = mtk_cg_enable, .disable = mtk_cg_disable, }; +EXPORT_SYMBOL_GPL(mtk_clk_gate_ops_setclr); const struct clk_ops mtk_clk_gate_ops_setclr_inv = { .is_enabled = mtk_cg_bit_is_set, .enable = mtk_cg_enable_inv, .disable = mtk_cg_disable_inv, }; +EXPORT_SYMBOL_GPL(mtk_clk_gate_ops_setclr_inv); const struct clk_ops mtk_clk_gate_ops_no_setclr = { .is_enabled = mtk_cg_bit_is_cleared, .enable = mtk_cg_enable_no_setclr, .disable = mtk_cg_disable_no_setclr, }; +EXPORT_SYMBOL_GPL(mtk_clk_gate_ops_no_setclr); const struct clk_ops mtk_clk_gate_ops_no_setclr_inv = { .is_enabled = mtk_cg_bit_is_set, .enable = mtk_cg_enable_inv_no_setclr, .disable = mtk_cg_disable_inv_no_setclr, }; +EXPORT_SYMBOL_GPL(mtk_clk_gate_ops_no_setclr_inv); struct clk *mtk_clk_register_gate( const char *name, @@ -181,3 +186,6 @@ struct clk *mtk_clk_register_gate( return clk; } +EXPORT_SYMBOL_GPL(mtk_clk_register_gate); + +MODULE_LICENSE("GPL"); diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 74890759e98c..8d5791b3f460 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -11,6 +11,7 @@ #include <linux/slab.h> #include <linux/delay.h> #include <linux/clkdev.h> +#include <linux/module.h> #include <linux/mfd/syscon.h> #include <linux/device.h> #include <linux/of_device.h> @@ -42,6 +43,7 @@ err_out: return NULL; } +EXPORT_SYMBOL_GPL(mtk_alloc_clk_data); void mtk_free_clk_data(struct clk_onecell_data *clk_data) { @@ -77,6 +79,7 @@ void mtk_clk_register_fixed_clks(const struct mtk_fixed_clk *clks, clk_data->clks[rc->id] = clk; } } +EXPORT_SYMBOL_GPL(mtk_clk_register_fixed_clks); void mtk_clk_register_factors(const struct mtk_fixed_factor *clks, int num, struct clk_onecell_data *clk_data) @@ -103,6 +106,7 @@ void mtk_clk_register_factors(const struct mtk_fixed_factor *clks, clk_data->clks[ff->id] = clk; } } +EXPORT_SYMBOL_GPL(mtk_clk_register_factors); int mtk_clk_register_gates_with_dev(struct device_node *node, const struct mtk_gate *clks, @@ -155,6 +159,7 @@ int mtk_clk_register_gates(struct device_node *node, return mtk_clk_register_gates_with_dev(node, clks, num, clk_data, NULL); } +EXPORT_SYMBOL_GPL(mtk_clk_register_gates); struct clk *mtk_clk_register_composite(const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock) @@ -268,6 +273,7 @@ void mtk_clk_register_composites(const struct mtk_composite *mcs, clk_data->clks[mc->id] = clk; } } +EXPORT_SYMBOL_GPL(mtk_clk_register_composites); void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num, void __iomem *base, spinlock_t *lock, @@ -326,3 +332,5 @@ free_data: mtk_free_clk_data(clk_data); return r; } + +MODULE_LICENSE("GPL"); diff --git a/drivers/clk/mediatek/clk-mux.c b/drivers/clk/mediatek/clk-mux.c index 855b0a1f7eb9..6b8a274e2c01 100644 --- a/drivers/clk/mediatek/clk-mux.c +++ b/drivers/clk/mediatek/clk-mux.c @@ -8,6 +8,7 @@ #include <linux/of_address.h> #include <linux/slab.h> #include <linux/mfd/syscon.h> +#include <linux/module.h> #include "clk-mtk.h" #include "clk-mux.h" @@ -195,3 +196,6 @@ int mtk_clk_register_muxes(const struct mtk_mux *muxes, return 0; } +EXPORT_SYMBOL_GPL(mtk_clk_register_muxes); + +MODULE_LICENSE("GPL"); diff --git a/drivers/clk/mediatek/clk-pll.c b/drivers/clk/mediatek/clk-pll.c index 99ada6e06697..60d7ffa0b924 100644 --- a/drivers/clk/mediatek/clk-pll.c +++ b/drivers/clk/mediatek/clk-pll.c @@ -7,6 +7,7 @@ #include <linux/of.h> #include <linux/of_address.h> #include <linux/io.h> +#include <linux/module.h> #include <linux/slab.h> #include <linux/clkdev.h> #include <linux/delay.h> @@ -385,3 +386,6 @@ void mtk_clk_register_plls(struct device_node *node, clk_data->clks[pll->id] = clk; } } +EXPORT_SYMBOL_GPL(mtk_clk_register_plls); + +MODULE_LICENSE("GPL"); diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c index e562dc3c10a4..ffe464ce7ff8 100644 --- a/drivers/clk/mediatek/reset.c +++ b/drivers/clk/mediatek/reset.c @@ -137,3 +137,5 @@ void mtk_register_reset_controller_set_clr(struct device_node *np, mtk_register_reset_controller_common(np, num_regs, regofs, &mtk_reset_ops_set_clr); } + +MODULE_LICENSE("GPL"); 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