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author | Ludovic Desroches <ludovic.desroches@atmel.com> | 2015-01-27 16:30:32 +0100 |
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committer | Vinod Koul <vinod.koul@intel.com> | 2015-02-04 23:12:29 -0800 |
commit | 6d3a7d9e3ada345948f72564ce638c412ccd8c4a (patch) | |
tree | d76e829bc3b094b12676cf6ff7220615412da764 /tools | |
parent | be835074829b13c5f635ef78ed911b13b9c15fa9 (diff) | |
download | linux-6d3a7d9e3ada345948f72564ce638c412ccd8c4a.tar.bz2 |
dmaengine: at_xdmac: allow muliple dwidths when doing slave transfers
When using FIFO, we need to support differents data width in a single
transfer. For example, serial device which usually uses 1-byte data
width will use 4-bytes data width when using the FIFO. If the transfer
size is not aligned on 4-bytes then the end of the transfer will be
performed with 1-byte data-width. For that reason,
at_xdmac_prep_slave_sg() now builds linked list descriptors using view 2
instead of view 1 so each of them can update the DWIDTH field into the
Channel Configuration Register.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'tools')
0 files changed, 0 insertions, 0 deletions