diff options
author | Sean Christopherson <seanjc@google.com> | 2022-06-02 13:41:33 -0700 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2022-06-11 11:47:22 -0400 |
commit | 768e9a61856b75de08f5efa5813bb3e7f16ec271 (patch) | |
tree | 013104333c2f15ff33996b92a2b5b5dc6fc1853a /tools/testing/selftests/kvm/x86_64/set_sregs_test.c | |
parent | 5260db3eb8f96c0dc631b0f41035a5f1957d9a58 (diff) | |
download | linux-768e9a61856b75de08f5efa5813bb3e7f16ec271.tar.bz2 |
KVM: selftests: Purge vm+vcpu_id == vcpu silliness
Take a vCPU directly instead of a VM+vcpu pair in all vCPU-scoped helpers
and ioctls.
Signed-off-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'tools/testing/selftests/kvm/x86_64/set_sregs_test.c')
-rw-r--r-- | tools/testing/selftests/kvm/x86_64/set_sregs_test.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/tools/testing/selftests/kvm/x86_64/set_sregs_test.c b/tools/testing/selftests/kvm/x86_64/set_sregs_test.c index 2e67df3a95ba..dd344439ad33 100644 --- a/tools/testing/selftests/kvm/x86_64/set_sregs_test.c +++ b/tools/testing/selftests/kvm/x86_64/set_sregs_test.c @@ -35,11 +35,11 @@ static void test_cr4_feature_bit(struct kvm_vcpu *vcpu, struct kvm_sregs *orig, memcpy(&sregs, orig, sizeof(sregs)); sregs.cr4 |= feature_bit; - rc = _vcpu_sregs_set(vcpu->vm, vcpu->id, &sregs); + rc = _vcpu_sregs_set(vcpu, &sregs); TEST_ASSERT(rc, "KVM allowed unsupported CR4 bit (0x%lx)", feature_bit); /* Sanity check that KVM didn't change anything. */ - vcpu_sregs_get(vcpu->vm, vcpu->id, &sregs); + vcpu_sregs_get(vcpu, &sregs); TEST_ASSERT(!memcmp(&sregs, orig, sizeof(sregs)), "KVM modified sregs"); } @@ -97,15 +97,15 @@ int main(int argc, char *argv[]) vm = vm_create_barebones(); vcpu = __vm_vcpu_add(vm, 0); - vcpu_sregs_get(vm, vcpu->id, &sregs); + vcpu_sregs_get(vcpu, &sregs); sregs.cr4 |= calc_cr4_feature_bits(vm); cr4 = sregs.cr4; - rc = _vcpu_sregs_set(vm, vcpu->id, &sregs); + rc = _vcpu_sregs_set(vcpu, &sregs); TEST_ASSERT(!rc, "Failed to set supported CR4 bits (0x%lx)", cr4); - vcpu_sregs_get(vm, vcpu->id, &sregs); + vcpu_sregs_get(vcpu, &sregs); TEST_ASSERT(sregs.cr4 == cr4, "sregs.CR4 (0x%llx) != CR4 (0x%lx)", sregs.cr4, cr4); @@ -125,13 +125,13 @@ int main(int argc, char *argv[]) /* Create a "real" VM and verify APIC_BASE can be set. */ vm = vm_create_with_one_vcpu(&vcpu, NULL); - vcpu_sregs_get(vm, vcpu->id, &sregs); + vcpu_sregs_get(vcpu, &sregs); sregs.apic_base = 1 << 10; - rc = _vcpu_sregs_set(vm, vcpu->id, &sregs); + rc = _vcpu_sregs_set(vcpu, &sregs); TEST_ASSERT(rc, "Set IA32_APIC_BASE to %llx (invalid)", sregs.apic_base); sregs.apic_base = 1 << 11; - rc = _vcpu_sregs_set(vm, vcpu->id, &sregs); + rc = _vcpu_sregs_set(vcpu, &sregs); TEST_ASSERT(!rc, "Couldn't set IA32_APIC_BASE to %llx (valid)", sregs.apic_base); |