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| author | Dan Williams <dan.j.williams@intel.com> | 2022-05-18 16:35:00 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2022-05-19 08:50:41 -0700 |
| commit | a12562bb70776093b270f79a4b6ef18f4bcead2b (patch) | |
| tree | c1a376497302c826d74bbda4d96d617270161928 /tools/testing/cxl | |
| parent | dd2d42ad6f422076d1bd49b132bec74376c26f5c (diff) | |
| download | linux-a12562bb70776093b270f79a4b6ef18f4bcead2b.tar.bz2 | |
cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()
In preparation for changing how the driver handles 'mem_enable' in the CXL
DVSEC control register. Merge the contents of cxl_hdm_decode_init() into
cxl_dvsec_ranges() and rename the combined function cxl_hdm_decode_init().
The possible cleanups and fixes that result from this merge are saved for a
follow-on change.
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/165291690027.1426646.10249756632415633752.stgit@dwillia2-xfh
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/testing/cxl')
| -rw-r--r-- | tools/testing/cxl/Kbuild | 3 | ||||
| -rw-r--r-- | tools/testing/cxl/mock_mem.c | 10 | ||||
| -rw-r--r-- | tools/testing/cxl/test/mock.c | 8 |
3 files changed, 5 insertions, 16 deletions
diff --git a/tools/testing/cxl/Kbuild b/tools/testing/cxl/Kbuild index 2ea6fcb8baa5..33543231d453 100644 --- a/tools/testing/cxl/Kbuild +++ b/tools/testing/cxl/Kbuild @@ -9,7 +9,7 @@ ldflags-y += --wrap=devm_cxl_setup_hdm ldflags-y += --wrap=devm_cxl_add_passthrough_decoder ldflags-y += --wrap=devm_cxl_enumerate_decoders ldflags-y += --wrap=cxl_await_media_ready -ldflags-y += --wrap=cxl_dvsec_ranges +ldflags-y += --wrap=cxl_hdm_decode_init DRIVERS := ../../../drivers CXL_SRC := $(DRIVERS)/cxl @@ -36,7 +36,6 @@ cxl_port-y += config_check.o obj-m += cxl_mem.o cxl_mem-y := $(CXL_SRC)/mem.o -cxl_mem-y += mock_mem.o cxl_mem-y += config_check.o obj-m += cxl_core.o diff --git a/tools/testing/cxl/mock_mem.c b/tools/testing/cxl/mock_mem.c deleted file mode 100644 index 69946f678cfa..000000000000 --- a/tools/testing/cxl/mock_mem.c +++ /dev/null @@ -1,10 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* Copyright(c) 2022 Intel Corporation. All rights reserved. */ - -#include <linux/types.h> - -struct cxl_dev_state; -bool cxl_hdm_decode_init(struct cxl_dev_state *cxlds) -{ - return true; -} diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c index d6aa644822db..ddf0e7dd9249 100644 --- a/tools/testing/cxl/test/mock.c +++ b/tools/testing/cxl/test/mock.c @@ -208,8 +208,8 @@ int __wrap_cxl_await_media_ready(struct cxl_dev_state *cxlds) } EXPORT_SYMBOL_NS_GPL(__wrap_cxl_await_media_ready, CXL); -int __wrap_cxl_dvsec_ranges(struct cxl_dev_state *cxlds, - struct cxl_endpoint_dvsec_info *info) +int __wrap_cxl_hdm_decode_init(struct cxl_dev_state *cxlds, + struct cxl_endpoint_dvsec_info *info) { int rc = 0, index; struct cxl_mock_ops *ops = get_cxl_mock_ops(&index); @@ -217,12 +217,12 @@ int __wrap_cxl_dvsec_ranges(struct cxl_dev_state *cxlds, if (ops && ops->is_mock_dev(cxlds->dev)) info->mem_enabled = 1; else - rc = cxl_dvsec_ranges(cxlds, info); + rc = cxl_hdm_decode_init(cxlds, info); put_cxl_mock_ops(index); return rc; } -EXPORT_SYMBOL_NS_GPL(__wrap_cxl_dvsec_ranges, CXL); +EXPORT_SYMBOL_NS_GPL(__wrap_cxl_hdm_decode_init, CXL); MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS(ACPI); |