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author | Ingo Molnar <mingo@kernel.org> | 2016-07-25 19:48:41 +0200 |
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committer | Ingo Molnar <mingo@kernel.org> | 2016-07-25 19:48:41 +0200 |
commit | 674d2d69b14f677a771ceec4b48bfade94a0c5f1 (patch) | |
tree | 1413429fd703b57aaf9f5b7fdab4b283b32b13cd /tools/perf/util/intel-pt-decoder/insn.h | |
parent | 5048c2af078d5976895d521262a8802ea791f3b0 (diff) | |
parent | 4e3ba8af21b00b91b451e7c4a9fa3a63b025dd56 (diff) | |
download | linux-674d2d69b14f677a771ceec4b48bfade94a0c5f1.tar.bz2 |
Merge tag 'perf-core-for-mingo-20160725' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo:
- Add AVX-512 support to the instruction decoder, used by Intel PT,
fix vcvtph2ps instruction decoding (Adrian Hunter)
- Make objtool and vdso2c use the right arch header search path
(Stephen Rothwell, Josh Poimboeuf, Arnaldo Carvalho de Melo)
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'tools/perf/util/intel-pt-decoder/insn.h')
-rw-r--r-- | tools/perf/util/intel-pt-decoder/insn.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/tools/perf/util/intel-pt-decoder/insn.h b/tools/perf/util/intel-pt-decoder/insn.h index dd12da0f4593..e23578c7b1be 100644 --- a/tools/perf/util/intel-pt-decoder/insn.h +++ b/tools/perf/util/intel-pt-decoder/insn.h @@ -91,6 +91,7 @@ struct insn { #define X86_VEX_B(vex) ((vex) & 0x20) /* VEX3 Byte1 */ #define X86_VEX_L(vex) ((vex) & 0x04) /* VEX3 Byte2, VEX2 Byte1 */ /* VEX bit fields */ +#define X86_EVEX_M(vex) ((vex) & 0x03) /* EVEX Byte1 */ #define X86_VEX3_M(vex) ((vex) & 0x1f) /* VEX3 Byte1 */ #define X86_VEX2_M 1 /* VEX2.M always 1 */ #define X86_VEX_V(vex) (((vex) & 0x78) >> 3) /* VEX3 Byte2, VEX2 Byte1 */ @@ -133,6 +134,13 @@ static inline int insn_is_avx(struct insn *insn) return (insn->vex_prefix.value != 0); } +static inline int insn_is_evex(struct insn *insn) +{ + if (!insn->prefixes.got) + insn_get_prefixes(insn); + return (insn->vex_prefix.nbytes == 4); +} + /* Ensure this instruction is decoded completely */ static inline int insn_complete(struct insn *insn) { @@ -144,8 +152,10 @@ static inline insn_byte_t insn_vex_m_bits(struct insn *insn) { if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */ return X86_VEX2_M; - else + else if (insn->vex_prefix.nbytes == 3) /* 3 bytes VEX */ return X86_VEX3_M(insn->vex_prefix.bytes[1]); + else /* EVEX */ + return X86_EVEX_M(insn->vex_prefix.bytes[1]); } static inline insn_byte_t insn_vex_p_bits(struct insn *insn) |