diff options
| author | Andi Kleen <ak@linux.intel.com> | 2018-01-18 10:10:16 -0800 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2018-01-25 06:37:15 -0300 |
| commit | fae0a4df1cc6bb1772fa653a2c8eb422d82b824d (patch) | |
| tree | 87907da5578178fa51e8515e14a069dd69da42d7 /tools/perf/pmu-events/arch/x86/broadwellde/other.json | |
| parent | 1716021e2e88a284cc737db40524734dffea2de5 (diff) | |
| download | linux-fae0a4df1cc6bb1772fa653a2c8eb422d82b824d.tar.bz2 | |
perf vendor events intel: Update BroadwellDE events to V7
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/20180118234518.GA27753@tassilo.jf.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/pmu-events/arch/x86/broadwellde/other.json')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/broadwellde/other.json | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/tools/perf/pmu-events/arch/x86/broadwellde/other.json b/tools/perf/pmu-events/arch/x86/broadwellde/other.json index 718fcb1db2ee..4475249ea9da 100644 --- a/tools/perf/pmu-events/arch/x86/broadwellde/other.json +++ b/tools/perf/pmu-events/arch/x86/broadwellde/other.json @@ -10,16 +10,6 @@ "CounterHTOff": "0,1,2,3,4,5,6,7" }, { - "EventCode": "0x5C", - "UMask": "0x2", - "BriefDescription": "Unhalted core cycles when thread is in rings 1, 2, or 3", - "Counter": "0,1,2,3", - "EventName": "CPL_CYCLES.RING123", - "PublicDescription": "This event counts unhalted core cycles during which the thread is in rings 1, 2, or 3.", - "SampleAfterValue": "2000003", - "CounterHTOff": "0,1,2,3,4,5,6,7" - }, - { "EdgeDetect": "1", "EventCode": "0x5C", "UMask": "0x1", @@ -32,6 +22,16 @@ "CounterHTOff": "0,1,2,3,4,5,6,7" }, { + "EventCode": "0x5C", + "UMask": "0x2", + "BriefDescription": "Unhalted core cycles when thread is in rings 1, 2, or 3", + "Counter": "0,1,2,3", + "EventName": "CPL_CYCLES.RING123", + "PublicDescription": "This event counts unhalted core cycles during which the thread is in rings 1, 2, or 3.", + "SampleAfterValue": "2000003", + "CounterHTOff": "0,1,2,3,4,5,6,7" + }, + { "EventCode": "0x63", "UMask": "0x1", "BriefDescription": "Cycles when L1 and L2 are locked due to UC or split lock", |