diff options
| author | Adam Thomson <Adam.Thomson.Opensource@diasemi.com> | 2016-08-04 15:35:40 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2016-08-08 11:54:40 +0100 |
| commit | 4c75225aa05753217a81ed10f136b86fb94c5922 (patch) | |
| tree | 33bf8b068b3bd256d0a568b5b5c6cf41592f0bef /sound/soc/codecs/da7213.h | |
| parent | f612680fb5cd92a213240d82651a1f56bc38129e (diff) | |
| download | linux-4c75225aa05753217a81ed10f136b86fb94c5922.tar.bz2 | |
ASoC: da7213: Refactor sysclk(), pll() functions to improve handling
Currently the handling of the PLL in the driver is a little clunky,
and not ideal for all modes. This patch updates the code to make it
cleaner and more sensible for the various PLL states.
Key items of note are:
- MCLK squaring is now handled directly as part of the sysclk()
function, removing the need for a private flag to set this feature.
- All PLL modes are defined as an enum, and are handled as a case
statement in pll() function to clean up configuration. This also
removes any need for a private flag for SRM.
- For 32KHz mode, checks are made on codec master mode and correct
MCLK rates, to avoid incorrect usage of PLL for this operation.
- For 32KHz mode, SRM flag now correctly enabled and fout set to
sensible value to achieve appropriate PLL dividers.
Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/da7213.h')
| -rw-r--r-- | sound/soc/codecs/da7213.h | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/sound/soc/codecs/da7213.h b/sound/soc/codecs/da7213.h index fbb7a356a501..16ef56f77cd4 100644 --- a/sound/soc/codecs/da7213.h +++ b/sound/soc/codecs/da7213.h @@ -172,6 +172,7 @@ #define DA7213_PLL_32K_MODE (0x1 << 5) #define DA7213_PLL_SRM_EN (0x1 << 6) #define DA7213_PLL_EN (0x1 << 7) +#define DA7213_PLL_MODE_MASK (0x7 << 5) /* DA7213_DAI_CLK_MODE = 0x28 */ #define DA7213_DAI_BCLKS_PER_WCLK_32 (0x0 << 0) @@ -499,8 +500,6 @@ #define DA7213_ALC_AVG_ITERATIONS 5 /* PLL related */ -#define DA7213_SYSCLK_MCLK 0 -#define DA7213_SYSCLK_PLL 1 #define DA7213_PLL_FREQ_OUT_90316800 90316800 #define DA7213_PLL_FREQ_OUT_98304000 98304000 #define DA7213_PLL_FREQ_OUT_94310400 94310400 @@ -515,6 +514,13 @@ enum da7213_clk_src { DA7213_CLKSRC_MCLK_SQR, }; +enum da7213_sys_clk { + DA7213_SYSCLK_MCLK = 0, + DA7213_SYSCLK_PLL, + DA7213_SYSCLK_PLL_SRM, + DA7213_SYSCLK_PLL_32KHZ +}; + /* Codec private data */ struct da7213_priv { struct regmap *regmap; @@ -522,8 +528,6 @@ struct da7213_priv { unsigned int mclk_rate; int clk_src; bool master; - bool mclk_squarer_en; - bool srm_en; bool alc_calib_auto; bool alc_en; struct da7213_platform_data *pdata; |