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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2022-10-28 17:59:20 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-11-10 16:36:34 +0100
commit461e1857d6bf15cf5df103383e255f3425ac0038 (patch)
tree873bc62a02a53cd4405bb6aaa3f7008ed9cfa798 /scripts/config
parent4adb690aa1b41c1e52af579574d1d6aa58da1187 (diff)
downloadlinux-461e1857d6bf15cf5df103383e255f3425ac0038.tar.bz2
MAINTAINERS: Add entry for Renesas RISC-V
Add RISC-V architecture as part of ARM/Renesas architecture, as they have the same maintainers, use the same development collaboration infrastructure, and share many files. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Guo Ren <guoren@kernel.org> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20221028165921.94487-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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