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authorMasahiro Yamada <masahiroy@kernel.org>2022-04-07 00:30:23 +0900
committerMasahiro Yamada <masahiroy@kernel.org>2022-05-08 03:16:59 +0900
commitfeb7d79fea1d43ddf51a09359b52e73bba0340fd (patch)
treefcb4777f9502fe5a7f71cecb7ff078a27ad9121a /scripts/Makefile.build
parentfc93a4cdce1db7568fcdff608924324f5754efe5 (diff)
downloadlinux-feb7d79fea1d43ddf51a09359b52e73bba0340fd.tar.bz2
kbuild: read *.mod to get objects passed to $(LD) or $(AR)
ld and ar support @file, which command-line options are read from. Now that *.mod lists the member objects in the correct order, without duplication, it is ready to be passed to ld and ar. By using the @file syntax, people will not be worried about the pitfall described in the NOTE. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Diffstat (limited to 'scripts/Makefile.build')
-rw-r--r--scripts/Makefile.build10
1 files changed, 3 insertions, 7 deletions
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index 3da731cf6978..f6a506318795 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -450,22 +450,18 @@ quiet_cmd_ar_lib = AR $@
$(obj)/lib.a: $(lib-y) FORCE
$(call if_changed,ar_lib)
-# NOTE:
-# Do not replace $(filter %.o,^) with $(real-prereqs). When a single object
-# module is turned into a multi object module, $^ will contain header file
-# dependencies recorded in the .*.cmd file.
ifneq ($(CONFIG_LTO_CLANG)$(CONFIG_X86_KERNEL_IBT),)
quiet_cmd_link_multi-m = AR [M] $@
cmd_link_multi-m = \
$(cmd_update_lto_symversions); \
rm -f $@; \
- $(AR) cDPrsT $@ $(filter %.o,$^)
+ $(AR) cDPrsT $@ @$(patsubst %.o,%.mod,$@)
else
quiet_cmd_link_multi-m = LD [M] $@
- cmd_link_multi-m = $(LD) $(ld_flags) -r -o $@ $(filter %.o,$^)
+ cmd_link_multi-m = $(LD) $(ld_flags) -r -o $@ @$(patsubst %.o,%.mod,$@)
endif
-$(multi-obj-m): FORCE
+$(multi-obj-m): %.o: %.mod FORCE
$(call if_changed,link_multi-m)
$(call multi_depend, $(multi-obj-m), .o, -objs -y -m)