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authorJarkko Nikula <jarkko.nikula@linux.intel.com>2019-08-22 11:32:00 +0300
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2019-08-23 12:53:14 +0200
commit57b3006492a4c11b2d4a772b5b2905d544a32037 (patch)
tree5e0861694c827119b1f9c1624ba707d43d5850b5 /samples/vfs
parentd1abaeb3be7b5fa6d7a1fbbd2e14e3310005c4c1 (diff)
downloadlinux-57b3006492a4c11b2d4a772b5b2905d544a32037.tar.bz2
ACPI / LPSS: Save/restore LPSS private registers also on Lynxpoint
My assumption in commit b53548f9d9e4 ("spi: pxa2xx: Remove LPSS private register restoring during resume") that Intel Lynxpoint and compatible based chipsets may not need LPSS private registers saving and restoring over suspend/resume cycle turned out to be false on Intel Broadwell. Curtis Malainey sent a patch bringing above change back and reported the LPSS SPI Chip Select control was lost over suspend/resume cycle on Broadwell machine. Instead of reverting above commit lets add LPSS private register saving/restoring also for all LPSS SPI, I2C and UART controllers on Lynxpoint and compatible chipset to make sure context is not lost in case nothing else preserves it like firmware or if LPSS is always on. Fixes: b53548f9d9e4 ("spi: pxa2xx: Remove LPSS private register restoring during resume") Reported-by: Curtis Malainey <cujomalainey@chromium.org> Tested-by: Curtis Malainey <cujomalainey@chromium.org> Cc: 5.0+ <stable@vger.kernel.org> # 5.0+ Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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