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| author | Baruch Siach <baruch.siach@siklu.com> | 2022-04-11 21:45:27 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2022-04-19 13:13:47 +0100 |
| commit | b617be33502d2bfefffef71924c7a7ba50264ff6 (patch) | |
| tree | 51945c0a842e3f0a819b29bad019fd89debe981d /samples/kfifo | |
| parent | 4bbaa857e9af76d8cc346bd57fbaa50d357ae132 (diff) | |
| download | linux-b617be33502d2bfefffef71924c7a7ba50264ff6.tar.bz2 | |
spi: add SPI_RX_CPHA_FLIP mode bit
Some SPI devices latch MOSI bits on one clock phase, but produce valid
MISO bits on the other phase. Add SPI_RX_CPHA_FLIP mode to instruct the
controller driver to flip CPHA for Rx (MISO) only transfers.
Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
Link: https://lore.kernel.org/r/a715ca92713ca02071f33dcca9960a66a03c949a.1649702729.git.baruch@tkos.co.il
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'samples/kfifo')
0 files changed, 0 insertions, 0 deletions