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authorFlorian Fainelli <f.fainelli@gmail.com>2021-09-09 10:33:28 -0700
committerDavid S. Miller <davem@davemloft.net>2021-09-10 10:00:08 +0100
commite3f0cc1a945fcefec0c7c9d9dfd028a51daa1846 (patch)
tree50878ce4bfcc80815e3062642562e09bfde5111b /net
parentbfe84435090a6c85271b02a42b1d83fef9ff7cc7 (diff)
downloadlinux-e3f0cc1a945fcefec0c7c9d9dfd028a51daa1846.tar.bz2
r6040: Restore MDIO clock frequency after MAC reset
A number of users have reported that they were not able to get the PHY to successfully link up, especially after commit c36757eb9dee ("net: phy: consider AN_RESTART status when reading link status") where we stopped reading just BMSR, but we also read BMCR to determine the link status. Andrius at NetBSD did a wonderful job at debugging the problem and found out that the MDIO bus clock frequency would be incorrectly set back to its default value which would prevent the MDIO bus controller from reading PHY registers properly. Back when we only read BMSR, if we read all 1s, we could falsely indicate a link status, though in general there is a cable plugged in, so this went unnoticed. After a second read of BMCR was added, a wrong read will lead to the inability to determine a link UP condition which is when it started to be visibly broken, even if it was long before that. The fix consists in restoring the value of the MD_CSR register that was set prior to the MAC reset. Link: http://gnats.netbsd.org/cgi-bin/query-pr-single.pl?number=53494 Fixes: 90f750a81a29 ("r6040: consolidate MAC reset to its own function") Reported-by: Andrius V <vezhlys@gmail.com> Reported-by: Darek Strugacz <darek.strugacz@op.pl> Tested-by: Darek Strugacz <darek.strugacz@op.pl> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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