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| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2022-08-16 15:32:56 -0400 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-08-31 10:49:53 -0700 |
| commit | f24d71feb206631116ff9adaa6d43650c5dd8849 (patch) | |
| tree | bc88f1eab85df85444fe3a677fd0644f1f229896 /net/xdp | |
| parent | 3f0dadd230cc2630202a977fe52cd1dd7a7579a7 (diff) | |
| download | linux-f24d71feb206631116ff9adaa6d43650c5dd8849.tar.bz2 | |
clk: mediatek: clk-mt8195-vdo1: Reparent and set rate on vdo1_dpintf's parent
Like it was done for the vdo0_dp_intf0_dp_intf clock (used for eDP),
add the CLK_SET_RATE_PARENT flag to CLK_VDO1_DPINTF (used for DP)
and also fix its parent clock name as it has to be "top_dp" for two
reasons:
- This is its real parent!
- Likewise to eDP/VDO0 counterpart, we need clock source
selection on CLK_TOP_DP.
Fixes: 269987505ba9 ("clk: mediatek: Add MT8195 vdosys1 clock support")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220816193257.658487-3-nfraprado@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'net/xdp')
0 files changed, 0 insertions, 0 deletions