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authorTaniya Das <tdas@codeaurora.org>2022-02-27 23:25:35 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2022-03-09 08:53:29 -0600
commit58922910add18583d5273c2edcdb9fd7bf4eca02 (patch)
treee274969792a42570ec86aed4a979394da75e9a46 /net/ncsi/ncsi-pkt.h
parent89f0f1a4601562481b57f61988da7fdb62dfce82 (diff)
downloadlinux-58922910add18583d5273c2edcdb9fd7bf4eca02.tar.bz2
clk: qcom: clk-rcg2: Update logic to calculate D value for RCG
The display pixel clock has a requirement on certain newer platforms to support M/N as (2/3) and the final D value calculated results in underflow errors. As the current implementation does not check for D value is within the accepted range for a given M & N value. Update the logic to calculate the final D value based on the range. Fixes: 99cbd064b059f ("clk: qcom: Support display RCG clocks") Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220227175536.3131-1-tdas@codeaurora.org
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