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author | Ley Foon Tan <leyfoon.tan@starfivetech.com> | 2023-01-05 11:37:05 +0800 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-01-25 07:20:00 -0800 |
commit | c1d6105869464635d8a2bcf87a43c05f4c0cfca4 (patch) | |
tree | e84b4599e8eae81d80ef5c8a5ee35f48ee96ae22 /net/l2tp | |
parent | ca0254998be4d74cf6add70ccfab0d2dbd362a10 (diff) | |
download | linux-c1d6105869464635d8a2bcf87a43c05f4c0cfca4.tar.bz2 |
riscv: Move call to init_cpu_topology() to later initialization stage
If "capacity-dmips-mhz" is present in a CPU DT node,
topology_parse_cpu_capacity() will fail to allocate memory. arm64, with
which this code path is shared, does not call
topology_parse_cpu_capacity() until later in boot where memory
allocation is available. While "capacity-dmips-mhz" is not yet a valid
property on RISC-V, invalid properties should be ignored rather than
cause issues. Move init_cpu_topology(), which calls
topology_parse_cpu_capacity(), to a later initialization stage, to match
arm64.
As a side effect of this change, RISC-V is "protected" from changes to
core topology code that would work on arm64 where memory allocation is
safe but on RISC-V isn't.
Fixes: 03f11f03dbfe ("RISC-V: Parse cpu topology during boot.")
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Link: https://lore.kernel.org/r/20230105033705.3946130-1-leyfoon.tan@starfivetech.com
[Palmer: use Conor's commit text]
Link: https://lore.kernel.org/linux-riscv/20230104183033.755668-1-pierre.gondois@arm.com/T/#me592d4c8b9508642954839f0077288a353b0b9b2
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'net/l2tp')
0 files changed, 0 insertions, 0 deletions