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authorMika Westerberg <mika.westerberg@linux.intel.com>2018-09-18 18:36:21 +0300
committerLinus Walleij <linus.walleij@linaro.org>2018-09-20 08:21:52 -0700
commit96147db1e1dff83679e71ac92193cbcab761a14c (patch)
treefae535aee78745d578e851c541c611389c11a5cf /mm/memcontrol.c
parent8e2aac333785f91ff74e219a1e78e6bdc1ef2c41 (diff)
downloadlinux-96147db1e1dff83679e71ac92193cbcab761a14c.tar.bz2
pinctrl: intel: Do pin translation in other GPIO operations as well
For some reason I thought GPIOLIB handles translation from GPIO ranges to pinctrl pins but it turns out not to be the case. This means that when GPIOs operations are performed for a pin controller having a custom GPIO base such as Cannon Lake and Ice Lake incorrect pin number gets used internally. Fix this in the same way we did for lock/unlock IRQ operations and translate the GPIO number to pin before using it. Fixes: a60eac3239f0 ("pinctrl: intel: Allow custom GPIO base for pad groups") Reported-by: Rajat Jain <rajatja@google.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Rajat Jain <rajatja@google.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'mm/memcontrol.c')
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