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authorChangbin Du <changbin.du@intel.com>2018-01-30 19:19:53 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2018-03-06 13:19:20 +0800
commite502a2af4c358d14ecf8fce51bf4988ebb4d10b4 (patch)
tree4007370f9bd6f748e58331a3c18d28fb5b91f3f8 /lib/chacha20.c
parent0947572849cb3ca7028d9daa3958158639ae4d69 (diff)
downloadlinux-e502a2af4c358d14ecf8fce51bf4988ebb4d10b4.tar.bz2
drm/i915/gvt: Provide generic page_track infrastructure for write-protected page
This patch provide generic page_track infrastructure for write-protected guest page. The old page_track logic gets rewrote and now stays in a new standalone page_track.c. This page track infrastructure can be both used by vGUC and GTT shadowing. The important change is that it uses radix tree instead of hash table. We don't have a predictable number of pages that will be tracked. Here is some performance data (duration in us) of looking up a element: Before: (aka. intel_vgpu_find_tracked_page) 0.091 0.089 0.090 ... 0.093 0.091 0.087 ... 0.292 0.285 0.292 0.291 After: (aka. intel_vgpu_find_page_track) 0.104 0.105 0.100 0.102 0.102 0.100 ... 0.101 0.101 0.105 0.105 The hash table has good performance at beginning, but turns bad with more pages being tracked even no 3D applications are running. As expected, radix tree has stable duration and very quick. The overall benchmark (tested with Heaven Benchmark) marginally improved since this is not the bottleneck. What we benefit more from this change is scalability. Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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