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| author | Gabriel FERNANDEZ <gabriel.fernandez@st.com> | 2014-02-27 16:24:15 +0100 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2014-03-25 15:58:56 -0700 |
| commit | b9b8e614b5805a99a5484c3d44fbfebaa8de4c65 (patch) | |
| tree | abbc02277f367a476806f2a61bf1a89a86912210 /kernel/ksysfs.c | |
| parent | 94885faf9dbcc2ca704d60e7db2f2b87e0b0fe6e (diff) | |
| download | linux-b9b8e614b5805a99a5484c3d44fbfebaa8de4c65.tar.bz2 | |
clk: st: Support for PLLs inside ClockGenA(s)
The patch supports the c65/c32 type PLLs used by ClockGenA(s)
PLL clock : It includes support for all c65/c32 type PLLs
inside ClockGenA(s) : implemented as Fixed Parent / Fixed Rate clock,
with clock rate calculated reading H/w settings done at BOOT.
c65 PLLs have 2 outputs : HS and LS
c32 PLLs have 1-4 outputs : ODFx
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'kernel/ksysfs.c')
0 files changed, 0 insertions, 0 deletions