diff options
| author | Paul Cercueil <paul@crapouillou.net> | 2020-05-06 00:13:36 +0200 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2020-05-11 16:35:05 +0200 |
| commit | 378252b6e24f764a5e41eb4552f1c3989ca12e81 (patch) | |
| tree | e535d682ae9f85a062e5d59d68fdd4fa97564557 /kernel/auditsc.c | |
| parent | 15eeadd801c0ea65c44c01f243f45097ac5970a8 (diff) | |
| download | linux-378252b6e24f764a5e41eb4552f1c3989ca12e81.tar.bz2 | |
rtc: ingenic: Reset regulator register in probe
The regulator register specifies how many input clock cycles (minus one)
are contained in one tick of the 1 Hz clock.
Since this register can contain bogus values after the system boots, it
needs to be reset in the probe register, otherwise the RTC may count way
to slow or way too fast.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20200505221336.222313-7-paul@crapouillou.net
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'kernel/auditsc.c')
0 files changed, 0 insertions, 0 deletions