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| author | Will Deacon <will.deacon@arm.com> | 2015-05-14 18:05:50 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2015-07-27 15:28:52 +0100 |
| commit | e9a4b795652f654a7870727e5333c1b709b8736c (patch) | |
| tree | ade6676d032ea31c5f24c210d778a857b16a37a5 /ipc | |
| parent | c342f78217e822d2178265b0b1de232eeb717149 (diff) | |
| download | linux-e9a4b795652f654a7870727e5333c1b709b8736c.tar.bz2 | |
arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPU
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our cmpxchg_double primitives
so that the LSE casp instruction is used instead.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'ipc')
0 files changed, 0 insertions, 0 deletions