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| author | José Roberto de Souza <jose.souza@intel.com> | 2019-09-24 14:00:40 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2019-09-25 12:13:22 -0700 |
| commit | 6677c3b167b3ba9fa183015f6244e2db28d99f29 (patch) | |
| tree | b0490d840831caf827618209c8687eb1002c603b /ipc/msgutil.c | |
| parent | ee7de6ad382d8d0fcf5bdb7443c7bc1f55e9d0f5 (diff) | |
| download | linux-6677c3b167b3ba9fa183015f6244e2db28d99f29.tar.bz2 | |
drm/i915/tgl: Return the mg/dkl pll as DDI clock for new TC ports
TGL added 2 more TC ports that currently are not being handled by
icl_pll_to_ddi_clk_sel(), so adding those.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reported-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190924210040.142075-6-jose.souza@intel.com
Diffstat (limited to 'ipc/msgutil.c')
0 files changed, 0 insertions, 0 deletions