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authorLinus Torvalds <torvalds@linux-foundation.org>2014-04-11 12:04:15 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-04-11 12:04:15 -0700
commit40e9963e622cf28ecef258e3dddb04457b65681c (patch)
treef8df0dec584da3ea243bc3feef5a3e143dff08bd /include
parent8eab6cd031c11071cf88138b2fed19beaa216435 (diff)
parent0534af01cca338193abbfdb53650af91e65dbf10 (diff)
downloadlinux-40e9963e622cf28ecef258e3dddb04457b65681c.tar.bz2
Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pullx86 core platform updates from Peter Anvin: "This is the x86/platform branch with the objectionable IOSF patches removed. What is left is proper memory handling for Intel GPUs, and a change to the Calgary IOMMU code which will be required to make kexec work sanely on those platforms after some upcoming kexec changes" * 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, calgary: Use 8M TCE table size by default x86/gpu: Print the Intel graphics stolen memory range x86/gpu: Add Intel graphics stolen memory quirk for gen2 platforms x86/gpu: Add vfunc for Intel graphics stolen memory base address
Diffstat (limited to 'include')
-rw-r--r--include/drm/i915_drm.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 97d5497debc1..595f85c392ac 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -56,6 +56,12 @@ extern bool i915_gpu_turbo_disable(void);
#define I830_GMCH_CTRL 0x52
+#define I830_GMCH_GMS_MASK 0x70
+#define I830_GMCH_GMS_LOCAL 0x10
+#define I830_GMCH_GMS_STOLEN_512 0x20
+#define I830_GMCH_GMS_STOLEN_1024 0x30
+#define I830_GMCH_GMS_STOLEN_8192 0x40
+
#define I855_GMCH_GMS_MASK 0xF0
#define I855_GMCH_GMS_STOLEN_0M 0x0
#define I855_GMCH_GMS_STOLEN_1M (0x1 << 4)
@@ -72,4 +78,18 @@ extern bool i915_gpu_turbo_disable(void);
#define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4)
#define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4)
+#define I830_DRB3 0x63
+#define I85X_DRB3 0x43
+#define I865_TOUD 0xc4
+
+#define I830_ESMRAMC 0x91
+#define I845_ESMRAMC 0x9e
+#define I85X_ESMRAMC 0x61
+#define TSEG_ENABLE (1 << 0)
+#define I830_TSEG_SIZE_512K (0 << 1)
+#define I830_TSEG_SIZE_1M (1 << 1)
+#define I845_TSEG_SIZE_MASK (3 << 1)
+#define I845_TSEG_SIZE_512K (2 << 1)
+#define I845_TSEG_SIZE_1M (3 << 1)
+
#endif /* _I915_DRM_H_ */