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authorSean Paul <seanpaul@chromium.org>2017-05-18 09:24:30 -0400
committerSean Paul <seanpaul@chromium.org>2017-05-18 09:24:30 -0400
commit6b7781b42dc9bc9bcd1523b6c24b876cdda0bef3 (patch)
treeee55c67e4ea30b9eb44f301ba0bde2e631a26162 /include/sound
parent52d9d38c183bf0e09601d875ea31bb53c05dd8cf (diff)
parente98c58e55f68f8785aebfab1f8c9a03d8de0afe1 (diff)
downloadlinux-6b7781b42dc9bc9bcd1523b6c24b876cdda0bef3.tar.bz2
Merge remote-tracking branch 'airlied/drm-next' into drm-misc-next
Picking up drm-next @ 4.12-rc1 in order to apply Michal Hocko's vmalloc patch set Signed-off-by: Sean Paul <seanpaul@chromium.org>
Diffstat (limited to 'include/sound')
-rw-r--r--include/sound/cs35l35.h108
-rw-r--r--include/sound/hda_register.h30
-rw-r--r--include/sound/hdaudio.h28
-rw-r--r--include/sound/soc.h14
4 files changed, 164 insertions, 16 deletions
diff --git a/include/sound/cs35l35.h b/include/sound/cs35l35.h
new file mode 100644
index 000000000000..29da899e17e4
--- /dev/null
+++ b/include/sound/cs35l35.h
@@ -0,0 +1,108 @@
+/*
+ * linux/sound/cs35l35.h -- Platform data for CS35l35
+ *
+ * Copyright (c) 2016 Cirrus Logic Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __CS35L35_H
+#define __CS35L35_H
+
+struct classh_cfg {
+ /*
+ * Class H Algorithm Control Variables
+ * You can either have it done
+ * automatically or you can adjust
+ * these variables for tuning
+ *
+ * if you do not enable the internal algorithm
+ * you will get a set of mixer controls for
+ * Class H tuning
+ *
+ * Section 4.3 of the datasheet
+ */
+ bool classh_bst_override;
+ bool classh_algo_enable;
+ int classh_bst_max_limit;
+ int classh_mem_depth;
+ int classh_release_rate;
+ int classh_headroom;
+ int classh_wk_fet_disable;
+ int classh_wk_fet_delay;
+ int classh_wk_fet_thld;
+ int classh_vpch_auto;
+ int classh_vpch_rate;
+ int classh_vpch_man;
+};
+
+struct monitor_cfg {
+ /*
+ * Signal Monitor Data
+ * highly configurable signal monitoring
+ * data positioning and different types of
+ * monitoring data.
+ *
+ * Section 4.8.2 - 4.8.4 of the datasheet
+ */
+ bool is_present;
+ bool imon_specs;
+ bool vmon_specs;
+ bool vpmon_specs;
+ bool vbstmon_specs;
+ bool vpbrstat_specs;
+ bool zerofill_specs;
+ u8 imon_dpth;
+ u8 imon_loc;
+ u8 imon_frm;
+ u8 imon_scale;
+ u8 vmon_dpth;
+ u8 vmon_loc;
+ u8 vmon_frm;
+ u8 vpmon_dpth;
+ u8 vpmon_loc;
+ u8 vpmon_frm;
+ u8 vbstmon_dpth;
+ u8 vbstmon_loc;
+ u8 vbstmon_frm;
+ u8 vpbrstat_dpth;
+ u8 vpbrstat_loc;
+ u8 vpbrstat_frm;
+ u8 zerofill_dpth;
+ u8 zerofill_loc;
+ u8 zerofill_frm;
+};
+
+struct cs35l35_platform_data {
+
+ /* Stereo (2 Device) */
+ bool stereo;
+ /* serial port drive strength */
+ int sp_drv_str;
+ /* serial port drive in unused slots */
+ int sp_drv_unused;
+ /* Boost Power Down with FET */
+ bool bst_pdn_fet_on;
+ /* Boost Voltage : used if ClassH Algo Enabled */
+ int bst_vctl;
+ /* Boost Converter Peak Current CTRL */
+ int bst_ipk;
+ /* Amp Gain Zero Cross */
+ bool gain_zc;
+ /* Audio Input Location */
+ int aud_channel;
+ /* Advisory Input Location */
+ int adv_channel;
+ /* Shared Boost for stereo */
+ bool shared_bst;
+ /* Specifies this amp is using an external boost supply */
+ bool ext_bst;
+ /* ClassH Algorithm */
+ struct classh_cfg classh_algo;
+ /* Monitor Config */
+ struct monitor_cfg mon_cfg;
+};
+
+#endif /* __CS35L35_H */
diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h
index 0013063db7f2..15fc6daf9096 100644
--- a/include/sound/hda_register.h
+++ b/include/sound/hda_register.h
@@ -106,8 +106,26 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_REG_HSW_EM4 0x100c
#define AZX_REG_HSW_EM5 0x1010
-/* Skylake/Broxton display HD-A controller Extended Mode registers */
-#define AZX_REG_SKL_EM4L 0x1040
+/* Skylake/Broxton vendor-specific registers */
+#define AZX_REG_VS_EM1 0x1000
+#define AZX_REG_VS_INRC 0x1004
+#define AZX_REG_VS_OUTRC 0x1008
+#define AZX_REG_VS_FIFOTRK 0x100C
+#define AZX_REG_VS_FIFOTRK2 0x1010
+#define AZX_REG_VS_EM2 0x1030
+#define AZX_REG_VS_EM3L 0x1038
+#define AZX_REG_VS_EM3U 0x103C
+#define AZX_REG_VS_EM4L 0x1040
+#define AZX_REG_VS_EM4U 0x1044
+#define AZX_REG_VS_LTRC 0x1048
+#define AZX_REG_VS_D0I3C 0x104A
+#define AZX_REG_VS_PCE 0x104B
+#define AZX_REG_VS_L2MAGC 0x1050
+#define AZX_REG_VS_L2LAHPT 0x1054
+#define AZX_REG_VS_SDXDPIB_XBASE 0x1084
+#define AZX_REG_VS_SDXDPIB_XINTERVAL 0x20
+#define AZX_REG_VS_SDXEFIFOS_XBASE 0x1094
+#define AZX_REG_VS_SDXEFIFOS_XINTERVAL 0x20
/* PCI space */
#define AZX_PCIREG_TCSEL 0x44
@@ -243,9 +261,11 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_REG_ML_LOUTPAY 0x20
#define AZX_REG_ML_LINPAY 0x30
-#define AZX_MLCTL_SPA (1<<16)
-#define AZX_MLCTL_CPA 23
-
+#define ML_LCTL_SCF_MASK 0xF
+#define AZX_MLCTL_SPA (0x1 << 16)
+#define AZX_MLCTL_CPA (0x1 << 23)
+#define AZX_MLCTL_SPA_SHIFT 16
+#define AZX_MLCTL_CPA_SHIFT 23
/* registers for DMA Resume Capability Structure */
#define AZX_DRSM_CAP_ID 0x5
diff --git a/include/sound/hdaudio.h b/include/sound/hdaudio.h
index 56004ec8d441..96546b30e900 100644
--- a/include/sound/hdaudio.h
+++ b/include/sound/hdaudio.h
@@ -368,24 +368,32 @@ void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
/*
* macros for easy use
*/
-#define _snd_hdac_chip_write(type, chip, reg, value) \
- ((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
-#define _snd_hdac_chip_read(type, chip, reg) \
- ((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
+#define _snd_hdac_chip_writeb(chip, reg, value) \
+ ((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + (reg)))
+#define _snd_hdac_chip_readb(chip, reg) \
+ ((chip)->io_ops->reg_readb((chip)->remap_addr + (reg)))
+#define _snd_hdac_chip_writew(chip, reg, value) \
+ ((chip)->io_ops->reg_writew(value, (chip)->remap_addr + (reg)))
+#define _snd_hdac_chip_readw(chip, reg) \
+ ((chip)->io_ops->reg_readw((chip)->remap_addr + (reg)))
+#define _snd_hdac_chip_writel(chip, reg, value) \
+ ((chip)->io_ops->reg_writel(value, (chip)->remap_addr + (reg)))
+#define _snd_hdac_chip_readl(chip, reg) \
+ ((chip)->io_ops->reg_readl((chip)->remap_addr + (reg)))
/* read/write a register, pass without AZX_REG_ prefix */
#define snd_hdac_chip_writel(chip, reg, value) \
- _snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
+ _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value)
#define snd_hdac_chip_writew(chip, reg, value) \
- _snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
+ _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value)
#define snd_hdac_chip_writeb(chip, reg, value) \
- _snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
+ _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value)
#define snd_hdac_chip_readl(chip, reg) \
- _snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
+ _snd_hdac_chip_readl(chip, AZX_REG_ ## reg)
#define snd_hdac_chip_readw(chip, reg) \
- _snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
+ _snd_hdac_chip_readw(chip, AZX_REG_ ## reg)
#define snd_hdac_chip_readb(chip, reg) \
- _snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
+ _snd_hdac_chip_readb(chip, AZX_REG_ ## reg)
/* update a register, pass without AZX_REG_ prefix */
#define snd_hdac_chip_updatel(chip, reg, mask, val) \
diff --git a/include/sound/soc.h b/include/sound/soc.h
index cdfb55f7aede..5170fd81e1fd 100644
--- a/include/sound/soc.h
+++ b/include/sound/soc.h
@@ -434,6 +434,8 @@ int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
int source, unsigned int freq, int dir);
int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
unsigned int freq_in, unsigned int freq_out);
+int snd_soc_codec_set_jack(struct snd_soc_codec *codec,
+ struct snd_soc_jack *jack, void *data);
int snd_soc_register_card(struct snd_soc_card *card);
int snd_soc_unregister_card(struct snd_soc_card *card);
@@ -497,7 +499,15 @@ void snd_soc_runtime_deactivate(struct snd_soc_pcm_runtime *rtd, int stream);
int snd_soc_runtime_set_dai_fmt(struct snd_soc_pcm_runtime *rtd,
unsigned int dai_fmt);
+#ifdef CONFIG_DMI
int snd_soc_set_dmi_name(struct snd_soc_card *card, const char *flavour);
+#else
+static inline int snd_soc_set_dmi_name(struct snd_soc_card *card,
+ const char *flavour)
+{
+ return 0;
+}
+#endif
/* Utility functions to get clock rates from various things */
int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
@@ -721,6 +731,7 @@ struct snd_soc_jack_gpio {
/* private: */
struct snd_soc_jack *jack;
struct delayed_work work;
+ struct notifier_block pm_notifier;
struct gpio_desc *desc;
void *data;
@@ -812,7 +823,6 @@ struct snd_soc_component {
unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */
unsigned int registered_as_component:1;
- unsigned int auxiliary:1; /* for auxiliary component of the card */
unsigned int suspended:1; /* is in suspend PM state */
struct list_head list;
@@ -913,6 +923,8 @@ struct snd_soc_codec_driver {
int clk_id, int source, unsigned int freq, int dir);
int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source,
unsigned int freq_in, unsigned int freq_out);
+ int (*set_jack)(struct snd_soc_codec *codec,
+ struct snd_soc_jack *jack, void *data);
/* codec IO */
struct regmap *(*get_regmap)(struct device *);