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| author | Yong Wu <yong.wu@mediatek.com> | 2021-01-11 19:19:11 +0800 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-02-01 11:31:19 +0000 |
| commit | 8d2c749e5252466d8fc1917101f137966c61fd1c (patch) | |
| tree | 21d64e7d3c597c464fd8881e0a2f5ef3c80e93fe /include/soc/mediatek | |
| parent | ab1d5281a62bafbd611fffdce7eab6eb9577aa0d (diff) | |
| download | linux-8d2c749e5252466d8fc1917101f137966c61fd1c.tar.bz2 | |
iommu/mediatek: Support master use iova over 32bit
After extending v7s, our pagetable already support iova reach
16GB(34bit). the master got the iova via dma_alloc_attrs may reach
34bits, but its HW register still is 32bit. then how to set the
bit32/bit33 iova? this depend on a SMI larb setting(bank_sel).
we separate whole 16GB iova to four banks:
bank: 0: 0~4G; 1: 4~8G; 2: 8-12G; 3: 12-16G;
The bank number is (iova >> 32).
We will preassign which bank the larbs belong to. currently we don't
have a interface for master to adjust its bank number.
Each a bank is a iova_region which is a independent iommu-domain.
the iova range for each iommu-domain can't cross 4G.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org> #for memory part
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Link: https://lore.kernel.org/r/20210111111914.22211-31-yong.wu@mediatek.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'include/soc/mediatek')
| -rw-r--r-- | include/soc/mediatek/smi.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/soc/mediatek/smi.h b/include/soc/mediatek/smi.h index 9371bf572ab8..4cf445dbbdaa 100644 --- a/include/soc/mediatek/smi.h +++ b/include/soc/mediatek/smi.h @@ -16,6 +16,7 @@ struct mtk_smi_larb_iommu { struct device *dev; unsigned int mmu; + unsigned char bank[32]; }; /* |