diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2022-08-01 14:37:31 +0300 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2022-08-25 16:23:52 +0200 |
| commit | d8c04e27d93eb0afd750d5ea60119a92b146a755 (patch) | |
| tree | f6eed6f5eee06e171a84b6c9522588c800493edf /include/linux/platform_data | |
| parent | 4b0133533e82af25d6aaf9d0c7b2a5af388feb74 (diff) | |
| download | linux-d8c04e27d93eb0afd750d5ea60119a92b146a755.tar.bz2 | |
platform/x86: pmc_atom: Fix SLP_TYPx bitfield mask
On Intel hardware the SLP_TYPx bitfield occupies bits 10-12 as per ACPI
specification (see Table 4.13 "PM1 Control Registers Fixed Hardware
Feature Control Bits" for the details).
Fix the mask and other related definitions accordingly.
Fixes: 93e5eadd1f6e ("x86/platform: New Intel Atom SOC power management controller driver")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220801113734.36131-1-andriy.shevchenko@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'include/linux/platform_data')
| -rw-r--r-- | include/linux/platform_data/x86/pmc_atom.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/linux/platform_data/x86/pmc_atom.h b/include/linux/platform_data/x86/pmc_atom.h index 3edfb6d4e67a..dd81f510e4cf 100644 --- a/include/linux/platform_data/x86/pmc_atom.h +++ b/include/linux/platform_data/x86/pmc_atom.h @@ -7,6 +7,8 @@ #ifndef PMC_ATOM_H #define PMC_ATOM_H +#include <linux/bits.h> + /* ValleyView Power Control Unit PCI Device ID */ #define PCI_DEVICE_ID_VLV_PMC 0x0F1C /* CherryTrail Power Control Unit PCI Device ID */ @@ -139,9 +141,9 @@ #define ACPI_MMIO_REG_LEN 0x100 #define PM1_CNT 0x4 -#define SLEEP_TYPE_MASK 0xFFFFECFF +#define SLEEP_TYPE_MASK GENMASK(12, 10) #define SLEEP_TYPE_S5 0x1C00 -#define SLEEP_ENABLE 0x2000 +#define SLEEP_ENABLE BIT(13) extern int pmc_atom_read(int offset, u32 *value); |