diff options
author | Stephen Boyd <sboyd@kernel.org> | 2022-11-29 12:02:07 -0800 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2022-11-29 12:02:07 -0800 |
commit | 5595eabd99934b464a4c845f968871ce029282bc (patch) | |
tree | 52bb5a7ab57dc23e31aea748c15abe5420c2362a /include/dt-bindings | |
parent | 9abf2313adc1ca1b6180c508c25f22f9395cc780 (diff) | |
parent | 8178e245fa953f793670147368642717fcdb302e (diff) | |
download | linux-5595eabd99934b464a4c845f968871ce029282bc.tar.bz2 |
Merge tag 'clk-imx-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx
Pull i.MX clk driver updates from Abel Vesa:
- Fix parent for FlexSPI clock for i.MX93
- Add USB suspend clock on i.MX8MP
- Unmap anatop base on error for i.MX93 driver
- Change enet clock parent to wakeup_axi_root for i.MX93
- Drop LPIT1, LPIT2, TPM1 and TPM3 clocks for i.MX93
- Mark HSIO bus clock and SYS_CNT clock as critical on i.MX93
- Add 320MHz and 640MHz entries to PLL146x
- Add audio shared gate and SAI clocks for i.MX8MP
* tag 'clk-imx-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux:
clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()
clk: imx8mn: fix imx8mn_enet_phy_sels clocks list
clk: imx8mn: fix imx8mn_sai2_sels clocks list
clk: imx: rename video_pll1 to video_pll
clk: imx: replace osc_hdmi with dummy
clk: imx8mn: rename vpu_pll to m7_alt_pll
clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gate
clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets
clk: imx8mp: Add audio shared gate
dt-bindings: clock: imx8mp: Add ids for the audio shared gate
clk: imx: pll14xx: Add 320 MHz and 640 MHz entries for PLL146x
clk: imx93: keep sys ctr clock always on
clk: imx: keep hsio bus clock always on
clk: imx93: drop tpm1/3, lpit1/2 clk
dt-bindings: clock: imx93: drop TPM1/3 LPIT1/2 entry
clk: imx93: correct enet clock
clk: imx93: unmap anatop base in error handling path
clk: imx: imx8mp: add shared clk gate for usb suspend clk
dt-bindings: clocks: imx8mp: Add ID for usb suspend clock
clk: imx93: correct the flexspi1 clock setting
Diffstat (limited to 'include/dt-bindings')
-rw-r--r-- | include/dt-bindings/clock/imx8mn-clock.h | 24 | ||||
-rw-r--r-- | include/dt-bindings/clock/imx8mp-clock.h | 12 | ||||
-rw-r--r-- | include/dt-bindings/clock/imx93-clock.h | 4 |
3 files changed, 27 insertions, 13 deletions
diff --git a/include/dt-bindings/clock/imx8mn-clock.h b/include/dt-bindings/clock/imx8mn-clock.h index 07b8a282c268..04809edab33c 100644 --- a/include/dt-bindings/clock/imx8mn-clock.h +++ b/include/dt-bindings/clock/imx8mn-clock.h @@ -16,40 +16,48 @@ #define IMX8MN_CLK_EXT4 7 #define IMX8MN_AUDIO_PLL1_REF_SEL 8 #define IMX8MN_AUDIO_PLL2_REF_SEL 9 -#define IMX8MN_VIDEO_PLL1_REF_SEL 10 +#define IMX8MN_VIDEO_PLL_REF_SEL 10 +#define IMX8MN_VIDEO_PLL1_REF_SEL IMX8MN_VIDEO_PLL_REF_SEL #define IMX8MN_DRAM_PLL_REF_SEL 11 #define IMX8MN_GPU_PLL_REF_SEL 12 -#define IMX8MN_VPU_PLL_REF_SEL 13 +#define IMX8MN_M7_ALT_PLL_REF_SEL 13 +#define IMX8MN_VPU_PLL_REF_SEL IMX8MN_M7_ALT_PLL_REF_SEL #define IMX8MN_ARM_PLL_REF_SEL 14 #define IMX8MN_SYS_PLL1_REF_SEL 15 #define IMX8MN_SYS_PLL2_REF_SEL 16 #define IMX8MN_SYS_PLL3_REF_SEL 17 #define IMX8MN_AUDIO_PLL1 18 #define IMX8MN_AUDIO_PLL2 19 -#define IMX8MN_VIDEO_PLL1 20 +#define IMX8MN_VIDEO_PLL 20 +#define IMX8MN_VIDEO_PLL1 IMX8MN_VIDEO_PLL #define IMX8MN_DRAM_PLL 21 #define IMX8MN_GPU_PLL 22 -#define IMX8MN_VPU_PLL 23 +#define IMX8MN_M7_ALT_PLL 23 +#define IMX8MN_VPU_PLL IMX8MN_M7_ALT_PLL #define IMX8MN_ARM_PLL 24 #define IMX8MN_SYS_PLL1 25 #define IMX8MN_SYS_PLL2 26 #define IMX8MN_SYS_PLL3 27 #define IMX8MN_AUDIO_PLL1_BYPASS 28 #define IMX8MN_AUDIO_PLL2_BYPASS 29 -#define IMX8MN_VIDEO_PLL1_BYPASS 30 +#define IMX8MN_VIDEO_PLL_BYPASS 30 +#define IMX8MN_VIDEO_PLL1_BYPASS IMX8MN_VIDEO_PLL_BYPASS #define IMX8MN_DRAM_PLL_BYPASS 31 #define IMX8MN_GPU_PLL_BYPASS 32 -#define IMX8MN_VPU_PLL_BYPASS 33 +#define IMX8MN_M7_ALT_PLL_BYPASS 33 +#define IMX8MN_VPU_PLL_BYPASS IMX8MN_M7_ALT_PLL_BYPASS #define IMX8MN_ARM_PLL_BYPASS 34 #define IMX8MN_SYS_PLL1_BYPASS 35 #define IMX8MN_SYS_PLL2_BYPASS 36 #define IMX8MN_SYS_PLL3_BYPASS 37 #define IMX8MN_AUDIO_PLL1_OUT 38 #define IMX8MN_AUDIO_PLL2_OUT 39 -#define IMX8MN_VIDEO_PLL1_OUT 40 +#define IMX8MN_VIDEO_PLL_OUT 40 +#define IMX8MN_VIDEO_PLL1_OUT IMX8MN_VIDEO_PLL_OUT #define IMX8MN_DRAM_PLL_OUT 41 #define IMX8MN_GPU_PLL_OUT 42 -#define IMX8MN_VPU_PLL_OUT 43 +#define IMX8MN_M7_ALT_PLL_OUT 43 +#define IMX8MN_VPU_PLL_OUT IMX8MN_M7_ALT_PLL_OUT #define IMX8MN_ARM_PLL_OUT 44 #define IMX8MN_SYS_PLL1_OUT 45 #define IMX8MN_SYS_PLL2_OUT 46 diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h index 9d5cc2ddde89..ede1f65a3147 100644 --- a/include/dt-bindings/clock/imx8mp-clock.h +++ b/include/dt-bindings/clock/imx8mp-clock.h @@ -324,8 +324,18 @@ #define IMX8MP_CLK_CLKOUT2_SEL 317 #define IMX8MP_CLK_CLKOUT2_DIV 318 #define IMX8MP_CLK_CLKOUT2 319 +#define IMX8MP_CLK_USB_SUSP 320 +#define IMX8MP_CLK_AUDIO_AHB_ROOT IMX8MP_CLK_AUDIO_ROOT +#define IMX8MP_CLK_AUDIO_AXI_ROOT 321 +#define IMX8MP_CLK_SAI1_ROOT 322 +#define IMX8MP_CLK_SAI2_ROOT 323 +#define IMX8MP_CLK_SAI3_ROOT 324 +#define IMX8MP_CLK_SAI5_ROOT 325 +#define IMX8MP_CLK_SAI6_ROOT 326 +#define IMX8MP_CLK_SAI7_ROOT 327 +#define IMX8MP_CLK_PDM_ROOT 328 -#define IMX8MP_CLK_END 320 +#define IMX8MP_CLK_END 329 #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 diff --git a/include/dt-bindings/clock/imx93-clock.h b/include/dt-bindings/clock/imx93-clock.h index 19bc32788d81..8e02859d8ce2 100644 --- a/include/dt-bindings/clock/imx93-clock.h +++ b/include/dt-bindings/clock/imx93-clock.h @@ -28,13 +28,9 @@ #define IMX93_CLK_M33_SYSTICK 19 #define IMX93_CLK_FLEXIO1 20 #define IMX93_CLK_FLEXIO2 21 -#define IMX93_CLK_LPIT1 22 -#define IMX93_CLK_LPIT2 23 #define IMX93_CLK_LPTMR1 24 #define IMX93_CLK_LPTMR2 25 -#define IMX93_CLK_TPM1 26 #define IMX93_CLK_TPM2 27 -#define IMX93_CLK_TPM3 28 #define IMX93_CLK_TPM4 29 #define IMX93_CLK_TPM5 30 #define IMX93_CLK_TPM6 31 |