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authorArnd Bergmann <arnd@arndb.de>2017-02-16 17:50:04 +0100
committerArnd Bergmann <arnd@arndb.de>2017-02-16 17:50:04 +0100
commit3e011039a3f376f246e662b0e3ffb08018e3416e (patch)
treec8269d3e684e2cf69bccf8fb8870dfdc59c9d627 /include/dt-bindings
parentd0f7de9258e1fa7b531f10a6bdb971a2417dfd8a (diff)
parent6b6a1867667a90f399762dc1ee6add5b4aa646c9 (diff)
downloadlinux-3e011039a3f376f246e662b0e3ffb08018e3416e.tar.bz2
Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/late
Pull "Amlogic DT updates for v4.11, round 2" from Kevin Hilman: - add SAR ADC driver - add ADC laddered keys to meson-gxbb-p200 board * tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM64: dts: meson-gxbb-p200: add ADC laddered keys ARM64: dts: meson: meson-gx: add the SAR ADC ARM64: dts: meson-gxl: add the pwm_ao_b pin ARM64: dts: meson-gx: add the missing pwm_AO_ab node clk: gxbb: fix CLKID_ETH defined twice ARM64: dts: meson-gxl: rename Nexbox A95x for consistency clk: gxbb: add the SAR ADC clocks and expose them dt-bindings: amlogic: Add WeTek boards ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play dt-bindings: vendor-prefix: Add wetek vendor prefix ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes ARM64: dts: meson-gxbb-vega-s95: Add LED ARM64: dts: meson-gx: add the serial CTS and RTS pin groups ARM64: dts: meson-gx: add the missing uart_AO_B clk: meson-gxbb: Export HDMI clocks ARM64: dts: meson-gxm: add SCPI configuration for GXM ARM64: dts: meson-gx: move the SCPI and SRAM nodes to meson-gx
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/gxbb-clkc.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index baade6f429d0..692846c7941b 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -14,15 +14,21 @@
#define CLKID_MPLL2 15
#define CLKID_SPI 34
#define CLKID_I2C 22
+#define CLKID_SAR_ADC 23
#define CLKID_ETH 36
#define CLKID_USB0 50
#define CLKID_USB1 51
#define CLKID_USB 55
+#define CLKID_HDMI_PCLK 63
#define CLKID_USB1_DDR_BRIDGE 64
#define CLKID_USB0_DDR_BRIDGE 65
+#define CLKID_SANA 69
+#define CLKID_GCLK_VENCI_INT0 77
#define CLKID_AO_I2C 93
#define CLKID_SD_EMMC_A 94
#define CLKID_SD_EMMC_B 95
#define CLKID_SD_EMMC_C 96
+#define CLKID_SAR_ADC_CLK 97
+#define CLKID_SAR_ADC_SEL 98
#endif /* __GXBB_CLKC_H */