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| author | Mikko Perttunen <mperttunen@nvidia.com> | 2022-09-20 11:11:57 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2022-10-24 14:53:35 +0200 |
| commit | 0e2b014eeb257173c72014ebd02ab0d60643f0f8 (patch) | |
| tree | 8610e58b48329460df9ca3a105dac996d7af7a4c /include/dt-bindings/clock | |
| parent | 9abf2313adc1ca1b6180c508c25f22f9395cc780 (diff) | |
| download | linux-0e2b014eeb257173c72014ebd02ab0d60643f0f8.tar.bz2 | |
dt-bindings: Add headers for NVDEC on Tegra234
Add clock, memory controller, powergate and reset dt-binding headers
necessary for NVDEC.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/tegra234-clock.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/tegra234-clock.h b/include/dt-bindings/clock/tegra234-clock.h index 173364a93381..56708bd14c1a 100644 --- a/include/dt-bindings/clock/tegra234-clock.h +++ b/include/dt-bindings/clock/tegra234-clock.h @@ -82,6 +82,8 @@ #define TEGRA234_CLK_I2S6 66U /** @brief clock recovered from I2S6 input */ #define TEGRA234_CLK_I2S6_SYNC_INPUT 67U +/** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_NVDEC */ +#define TEGRA234_CLK_NVDEC 83U /** PLL controlled by CLK_RST_CONTROLLER_PLLA_BASE for use by audio clocks */ #define TEGRA234_CLK_PLLA 93U /** @brief PLLP clk output */ @@ -130,6 +132,8 @@ #define TEGRA234_CLK_SYNC_I2S5 149U /** @brief output of mux controlled by CLK_RST_CONTROLLER_AUDIO_SYNC_CLK_I2S6 */ #define TEGRA234_CLK_SYNC_I2S6 150U +/** output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_PKA */ +#define TEGRA234_CLK_TSEC_PKA 154U /** @brief output of mux controlled by CLK_RST_CONTROLLER_CLK_SOURCE_UARTA */ #define TEGRA234_CLK_UARTA 155U /** @brief output of gate CLK_ENB_PEX1_CORE_6 */ |