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authorSamuel Holland <samuel@sholland.org>2021-01-03 04:00:04 -0600
committerChen-Yu Tsai <wens@csie.org>2021-01-06 19:34:29 +0800
commit0482a4e6de19bcfc3729dcc13b7b6dde03375bdb (patch)
treefeb343fd327e70ebd70925a09d661d78d53b205e /include/dt-bindings/clock
parent5c8fe583cce542aa0b84adc939ce85293de36e5e (diff)
downloadlinux-0482a4e6de19bcfc3729dcc13b7b6dde03375bdb.tar.bz2
clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
While no information about the H6 RSB controller is included in the datasheet or manual, the vendor BSP and power management blob both reference the RSB clock parent and register address. These values were verified by experimentation. Since this clock/reset are added late, the specifier is added at the end to maintain the existing DT binding. The code is kept in register order. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'include/dt-bindings/clock')
-rw-r--r--include/dt-bindings/clock/sun50i-h6-r-ccu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/sun50i-h6-r-ccu.h b/include/dt-bindings/clock/sun50i-h6-r-ccu.h
index 76136132a13e..890368d252c4 100644
--- a/include/dt-bindings/clock/sun50i-h6-r-ccu.h
+++ b/include/dt-bindings/clock/sun50i-h6-r-ccu.h
@@ -21,4 +21,6 @@
#define CLK_IR 11
#define CLK_W1 12
+#define CLK_R_APB2_RSB 13
+
#endif /* _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ */