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| author | Tomasz Figa <t.figa@samsung.com> | 2014-06-24 18:08:25 +0200 |
|---|---|---|
| committer | Tomasz Figa <t.figa@samsung.com> | 2014-07-26 02:47:10 +0200 |
| commit | 01f7ec260ab35291f23bf42b1a43367649392646 (patch) | |
| tree | 523c83e4337f544baa0d7371fd0b2e35c9377b9e /include/dt-bindings/clock/exynos4.h | |
| parent | 800c9797ad5b20edf3b9258b83624efdb2b06e02 (diff) | |
| download | linux-01f7ec260ab35291f23bf42b1a43367649392646.tar.bz2 | |
clk: samsung: exynos4: Add CLKOUT clock hierarchy
This patch adds definitions of clocks that are used to drive clock
output signals of particular CMU sub-blocks that are then fed to PMU and
handled by Exynos CLKOUT driver added in further patch.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'include/dt-bindings/clock/exynos4.h')
| -rw-r--r-- | include/dt-bindings/clock/exynos4.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h index 60fadfc8d6ba..5a9f50225e4a 100644 --- a/include/dt-bindings/clock/exynos4.h +++ b/include/dt-bindings/clock/exynos4.h @@ -34,6 +34,11 @@ #define CLK_MOUT_CORE 19 #define CLK_MOUT_APLL 20 #define CLK_SCLK_HDMIPHY 22 +#define CLK_OUT_DMC 23 +#define CLK_OUT_TOP 24 +#define CLK_OUT_LEFTBUS 25 +#define CLK_OUT_RIGHTBUS 26 +#define CLK_OUT_CPU 27 /* gate for special clocks (sclk) */ #define CLK_SCLK_FIMC0 128 |