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authorJiansong Chen <Jiansong.Chen@amd.com>2020-02-10 14:25:57 +0800
committerAlex Deucher <alexander.deucher@amd.com>2020-07-15 12:45:39 -0400
commitddd8fbe77dadf6d889a7bbd0f82fc29093582d75 (patch)
tree16ae81d8202a8c8f539af34ba2745ce8d95f74db /include/drm/amd_asic_type.h
parent6565547113c956897be3c57f4b2d6ac6cbedeffe (diff)
downloadlinux-ddd8fbe77dadf6d889a7bbd0f82fc29093582d75.tar.bz2
drm/amdgpu: add navy_flounder asic type
Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include/drm/amd_asic_type.h')
-rw-r--r--include/drm/amd_asic_type.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h
index 0c5bd1134460..8712e14991ed 100644
--- a/include/drm/amd_asic_type.h
+++ b/include/drm/amd_asic_type.h
@@ -55,6 +55,7 @@ enum amd_asic_type {
CHIP_NAVI14, /* 26 */
CHIP_NAVI12, /* 27 */
CHIP_SIENNA_CICHLID, /* 28 */
+ CHIP_NAVY_FLOUNDER, /* 29 */
CHIP_LAST,
};