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| author | Palmer Dabbelt <palmer@rivosinc.com> | 2022-11-29 18:35:14 -0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-12-12 09:30:34 -0800 |
| commit | b003b3b77d65133a0011ae3b7b255347438c12f6 (patch) | |
| tree | 3f0a23a3fa520c9283e56de23bed54280834fe36 /include/clocksource/timer-ti-dm.h | |
| parent | 7e1864332fbc1b993659eab7974da9fe8bf8c128 (diff) | |
| download | linux-b003b3b77d65133a0011ae3b7b255347438c12f6.tar.bz2 | |
RISC-V: Align the shadow stack
The standard RISC-V ABIs all require 16-byte stack alignment. We're
only calling that one function on the shadow stack so I doubt it'd
result in a real issue, but might as well keep this lined up.
Fixes: 31da94c25aea ("riscv: add VMAP_STACK overflow detection")
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Link: https://lore.kernel.org/r/20221130023515.20217-1-palmer@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'include/clocksource/timer-ti-dm.h')
0 files changed, 0 insertions, 0 deletions