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authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>2020-10-15 22:03:32 +0300
committerRob Clark <robdclark@chromium.org>2020-11-04 08:26:26 -0800
commite92ce317fbeb79d1e3869324059e1a47294dab18 (patch)
tree4fad3ed44c659de69ac5e950f5bb2ba1fac91f45 /drivers
parentb66ccc571319627931e3e61a72747329387eab45 (diff)
downloadlinux-e92ce317fbeb79d1e3869324059e1a47294dab18.tar.bz2
drm/msm/dsi_phy_10nm: implement PHY disabling
Implement phy_disable() callback to disable DSI PHY lanes and blocks when phy is not used. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: ff73ff194060 ("drm/msm/dsi: Populate the 10nm PHY funcs") Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
index 47403d4f2d28..d1b92d4dc197 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
@@ -192,6 +192,28 @@ static int dsi_10nm_phy_enable(struct msm_dsi_phy *phy, int src_pll_id,
static void dsi_10nm_phy_disable(struct msm_dsi_phy *phy)
{
+ void __iomem *base = phy->base;
+ u32 data;
+
+ DBG("");
+
+ if (dsi_phy_hw_v3_0_is_pll_on(phy))
+ pr_warn("Turning OFF PHY while PLL is on\n");
+
+ dsi_phy_hw_v3_0_config_lpcdrx(phy, false);
+ data = dsi_phy_read(base + REG_DSI_10nm_PHY_CMN_CTRL_0);
+
+ /* disable all lanes */
+ data &= ~0x1F;
+ dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, data);
+ dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_LANE_CTRL0, 0);
+
+ /* Turn off all PHY blocks */
+ dsi_phy_write(base + REG_DSI_10nm_PHY_CMN_CTRL_0, 0x00);
+ /* make sure phy is turned off */
+ wmb();
+
+ DBG("DSI%d PHY disabled", phy->id);
}
static int dsi_10nm_phy_init(struct msm_dsi_phy *phy)