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authorHarry Wentland <harry.wentland@amd.com>2019-05-14 09:05:37 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-05-24 12:20:52 -0500
commitd7316ddc610f15dac35eab4f9471cf1f45335dc3 (patch)
tree190b5d92e01bb8363f1823f9861fbfa09afeeb3d /drivers
parent5bb23532732384e90c876bbd2139fd08644b9847 (diff)
downloadlinux-d7316ddc610f15dac35eab4f9471cf1f45335dc3.tar.bz2
drm/amd/display: Add ASICREV_IS_PICASSO
[WHY] We only want to load DMCU FW on Picasso and Raven 2, not on Raven 1. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/display/include/dal_asic_id.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
index 1a9b7507784f..072d8d7debf5 100644
--- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h
+++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
@@ -139,13 +139,14 @@
#define RAVEN1_F0 0xF0
#define RAVEN_UNKNOWN 0xFF
-#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
-#define ASICREV_IS_RAVEN2(eChipRev) ((eChipRev >= RAVEN2_A0) && (eChipRev < 0xF0))
-#endif /* DCN1_01 */
#define ASIC_REV_IS_RAVEN(eChipRev) ((eChipRev >= RAVEN_A0) && eChipRev < RAVEN_UNKNOWN)
#define RAVEN1_F0 0xF0
#define ASICREV_IS_RV1_F0(eChipRev) ((eChipRev >= RAVEN1_F0) && (eChipRev < RAVEN_UNKNOWN))
+#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
+#define ASICREV_IS_PICASSO(eChipRev) ((eChipRev >= PICASSO_A0) && (eChipRev < RAVEN2_A0))
+#define ASICREV_IS_RAVEN2(eChipRev) ((eChipRev >= RAVEN2_A0) && (eChipRev < 0xF0))
+#endif /* DCN1_01 */
#define FAMILY_RV 142 /* DCN 1*/