diff options
author | Gene Chen <gene_chen@richtek.com> | 2021-05-18 01:33:14 +0800 |
---|---|---|
committer | Lee Jones <lee.jones@linaro.org> | 2021-06-02 10:50:02 +0100 |
commit | 3b0850440a06c54856fbb7afb6a366910462fa0a (patch) | |
tree | 082d8073403071a3b8fc9fa3d9457ed62a79bb72 /drivers | |
parent | b042c085de7aa89eedfe8df8388b19a0e6679a39 (diff) | |
download | linux-3b0850440a06c54856fbb7afb6a366910462fa0a.tar.bz2 |
mfd: mt6360: Merge different sub-devices I2C read/write
Merge different sub-devices I2C read/write functions into one Regmap,
because PMIC and LDO part need CRC bits for access protection.
Signed-off-by: Gene Chen <gene_chen@richtek.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mfd/Kconfig | 1 | ||||
-rw-r--r-- | drivers/mfd/mt6360-core.c | 203 |
2 files changed, 181 insertions, 23 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 40cb07bdd457..5232bc0db8c0 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -903,6 +903,7 @@ config MFD_MT6360 select MFD_CORE select REGMAP_I2C select REGMAP_IRQ + select CRC8 depends on I2C help Say Y here to enable MT6360 PMU/PMIC/LDO functional support. diff --git a/drivers/mfd/mt6360-core.c b/drivers/mfd/mt6360-core.c index a4c705c8dd68..e628953548ce 100644 --- a/drivers/mfd/mt6360-core.c +++ b/drivers/mfd/mt6360-core.c @@ -63,6 +63,18 @@ struct mt6360_ddata { #define MT6360_CRC8_POLYNOMIAL 0x7 +#define MT6360_CRC_I2C_ADDR_SIZE 1 +#define MT6360_CRC_REG_ADDR_SIZE 1 +/* prealloca read size = i2c device addr + i2c reg addr + val ... + crc8 */ +#define MT6360_ALLOC_READ_SIZE(_size) (_size + 3) +/* prealloca write size = i2c device addr + i2c reg addr + val ... + crc8 + dummy byte */ +#define MT6360_ALLOC_WRITE_SIZE(_size) (_size + 4) +#define MT6360_CRC_PREDATA_OFFSET (MT6360_CRC_I2C_ADDR_SIZE + MT6360_CRC_REG_ADDR_SIZE) +#define MT6360_CRC_CRC8_SIZE 1 +#define MT6360_CRC_DUMMY_BYTE_SIZE 1 +#define MT6360_REGMAP_REG_BYTE_SIZE 2 +#define I2C_ADDR_XLATE_8BIT(_addr, _rw) (((_addr & 0x7F) << 1) + _rw) + /* reg 0 -> 0 ~ 7 */ #define MT6360_CHG_TREG_EVT 4 #define MT6360_CHG_AICR_EVT 5 @@ -267,12 +279,6 @@ static const struct regmap_irq_chip mt6360_irq_chip = { .use_ack = true, }; -static const struct regmap_config mt6360_pmu_regmap_config = { - .reg_bits = 8, - .val_bits = 8, - .max_register = MT6360_PMU_MAXREG, -}; - static const struct resource mt6360_adc_resources[] = { DEFINE_RES_IRQ_NAMED(MT6360_ADC_DONEI, "adc_donei"), }; @@ -359,10 +365,160 @@ static int mt6360_check_vendor_info(struct mt6360_ddata *ddata) } static const unsigned short mt6360_slave_addr[MT6360_SLAVE_MAX] = { - MT6360_PMU_SLAVEID, + MT6360_TCPC_SLAVEID, MT6360_PMIC_SLAVEID, MT6360_LDO_SLAVEID, - MT6360_TCPC_SLAVEID, + MT6360_PMU_SLAVEID, +}; + +static int mt6360_xlate_pmicldo_addr(u8 *addr, int rw_size) +{ + /* Address is already in encoded [5:0] */ + *addr &= MT6360_ADDRESS_MASK; + + switch (rw_size) { + case 1: + *addr |= MT6360_DATA_SIZE_1_BYTE; + break; + case 2: + *addr |= MT6360_DATA_SIZE_2_BYTES; + break; + case 3: + *addr |= MT6360_DATA_SIZE_3_BYTES; + break; + case 4: + *addr |= MT6360_DATA_SIZE_4_BYTES; + break; + default: + return -EINVAL; + } + + return 0; +} + +static int mt6360_regmap_read(void *context, const void *reg, size_t reg_size, + void *val, size_t val_size) +{ + struct mt6360_ddata *ddata = context; + u8 bank = *(u8 *)reg; + u8 reg_addr = *(u8 *)(reg + 1); + struct i2c_client *i2c = ddata->i2c[bank]; + bool crc_needed = false; + u8 *buf; + int buf_len = MT6360_ALLOC_READ_SIZE(val_size); + int read_size = val_size; + u8 crc; + int ret; + + if (bank == MT6360_SLAVE_PMIC || bank == MT6360_SLAVE_LDO) { + crc_needed = true; + ret = mt6360_xlate_pmicldo_addr(®_addr, val_size); + if (ret < 0) + return ret; + read_size += MT6360_CRC_CRC8_SIZE; + } + + buf = kzalloc(buf_len, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + buf[0] = I2C_ADDR_XLATE_8BIT(i2c->addr, I2C_SMBUS_READ); + buf[1] = reg_addr; + + ret = i2c_smbus_read_i2c_block_data(i2c, reg_addr, read_size, + buf + MT6360_CRC_PREDATA_OFFSET); + if (ret < 0) + goto out; + else if (ret != read_size) { + ret = -EIO; + goto out; + } + + if (crc_needed) { + crc = crc8(ddata->crc8_tbl, buf, val_size + MT6360_CRC_PREDATA_OFFSET, 0); + if (crc != buf[val_size + MT6360_CRC_PREDATA_OFFSET]) { + ret = -EIO; + goto out; + } + } + + memcpy(val, buf + MT6360_CRC_PREDATA_OFFSET, val_size); +out: + kfree(buf); + return (ret < 0) ? ret : 0; +} + +static int mt6360_regmap_write(void *context, const void *val, size_t val_size) +{ + struct mt6360_ddata *ddata = context; + u8 bank = *(u8 *)val; + u8 reg_addr = *(u8 *)(val + 1); + struct i2c_client *i2c = ddata->i2c[bank]; + bool crc_needed = false; + u8 *buf; + int buf_len = MT6360_ALLOC_WRITE_SIZE(val_size); + int write_size = val_size - MT6360_REGMAP_REG_BYTE_SIZE; + int ret; + + if (bank == MT6360_SLAVE_PMIC || bank == MT6360_SLAVE_LDO) { + crc_needed = true; + ret = mt6360_xlate_pmicldo_addr(®_addr, val_size - MT6360_REGMAP_REG_BYTE_SIZE); + if (ret < 0) + return ret; + } + + buf = kzalloc(buf_len, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + buf[0] = I2C_ADDR_XLATE_8BIT(i2c->addr, I2C_SMBUS_WRITE); + buf[1] = reg_addr; + memcpy(buf + MT6360_CRC_PREDATA_OFFSET, val + MT6360_REGMAP_REG_BYTE_SIZE, write_size); + + if (crc_needed) { + buf[val_size] = crc8(ddata->crc8_tbl, buf, val_size, 0); + write_size += (MT6360_CRC_CRC8_SIZE + MT6360_CRC_DUMMY_BYTE_SIZE); + } + + ret = i2c_smbus_write_i2c_block_data(i2c, reg_addr, write_size, + buf + MT6360_CRC_PREDATA_OFFSET); + + kfree(buf); + return ret; +} + +static const struct regmap_bus mt6360_regmap_bus = { + .read = mt6360_regmap_read, + .write = mt6360_regmap_write, + + /* Due to PMIC and LDO CRC access size limit */ + .max_raw_read = 4, + .max_raw_write = 4, +}; + +static bool mt6360_is_readwrite_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MT6360_REG_TCPCSTART ... MT6360_REG_TCPCEND: + fallthrough; + case MT6360_REG_PMICSTART ... MT6360_REG_PMICEND: + fallthrough; + case MT6360_REG_LDOSTART ... MT6360_REG_LDOEND: + fallthrough; + case MT6360_REG_PMUSTART ... MT6360_REG_PMUEND: + return true; + } + + return false; +} + +static const struct regmap_config mt6360_regmap_config = { + .reg_bits = 16, + .val_bits = 8, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .max_register = MT6360_REG_PMUEND, + .writeable_reg = mt6360_is_readwrite_reg, + .readable_reg = mt6360_is_readwrite_reg, }; static int mt6360_probe(struct i2c_client *client) @@ -377,7 +533,22 @@ static int mt6360_probe(struct i2c_client *client) ddata->dev = &client->dev; i2c_set_clientdata(client, ddata); - ddata->regmap = devm_regmap_init_i2c(client, &mt6360_pmu_regmap_config); + for (i = 0; i < MT6360_SLAVE_MAX - 1; i++) { + ddata->i2c[i] = devm_i2c_new_dummy_device(&client->dev, + client->adapter, + mt6360_slave_addr[i]); + if (IS_ERR(ddata->i2c[i])) { + dev_err(&client->dev, + "Failed to get new dummy I2C device for address 0x%x", + mt6360_slave_addr[i]); + return PTR_ERR(ddata->i2c[i]); + } + } + ddata->i2c[MT6360_SLAVE_MAX - 1] = client; + + crc8_populate_msb(ddata->crc8_tbl, MT6360_CRC8_POLYNOMIAL); + ddata->regmap = devm_regmap_init(ddata->dev, &mt6360_regmap_bus, ddata, + &mt6360_regmap_config); if (IS_ERR(ddata->regmap)) { dev_err(&client->dev, "Failed to register regmap\n"); return PTR_ERR(ddata->regmap); @@ -395,20 +566,6 @@ static int mt6360_probe(struct i2c_client *client) return ret; } - ddata->i2c[0] = client; - for (i = 1; i < MT6360_SLAVE_MAX; i++) { - ddata->i2c[i] = devm_i2c_new_dummy_device(&client->dev, - client->adapter, - mt6360_slave_addr[i]); - if (IS_ERR(ddata->i2c[i])) { - dev_err(&client->dev, - "Failed to get new dummy I2C device for address 0x%x", - mt6360_slave_addr[i]); - return PTR_ERR(ddata->i2c[i]); - } - i2c_set_clientdata(ddata->i2c[i], ddata); - } - ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_AUTO, mt6360_devs, ARRAY_SIZE(mt6360_devs), NULL, 0, regmap_irq_get_domain(ddata->irq_data)); |