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authorBruce Allan <bruce.w.allan@intel.com>2011-02-25 06:58:03 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-03-11 02:05:26 -0800
commit1effb45cca29e22e4b2209bb567770b7e20a3a2b (patch)
tree32ea3837ac121d6d5777b673aa5ea8204134c1c2 /drivers
parent5661aeb08edcef6799861f92817f593c1fd7b272 (diff)
downloadlinux-1effb45cca29e22e4b2209bb567770b7e20a3a2b.tar.bz2
e1000e: extend EEE LPI timer to prevent dropped link
The link can be unexpectedly dropped when the timer for entering EEE low- power-idle quiet state expires too soon. The timer needs to be extended from 196usec to 200usec after every LCD (PHY) reset to prevent this from happening. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/e1000e/ich8lan.c29
1 files changed, 24 insertions, 5 deletions
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 232b42b7f7ce..cf18d65417e6 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -140,6 +140,11 @@
#define I82579_LPI_CTRL PHY_REG(772, 20)
#define I82579_LPI_CTRL_ENABLE_MASK 0x6000
+/* EMI Registers */
+#define I82579_EMI_ADDR 0x10
+#define I82579_EMI_DATA 0x11
+#define I82579_LPI_UPDATE_TIMER 0x4805 /* in 40ns units + 40 ns base value */
+
/* Strapping Option Register - RO */
#define E1000_STRAP 0x0000C
#define E1000_STRAP_SMBUS_ADDRESS_MASK 0x00FE0000
@@ -1723,11 +1728,25 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)
/* Configure the LCD with the OEM bits in NVM */
ret_val = e1000_oem_bits_config_ich8lan(hw, true);
- /* Ungate automatic PHY configuration on non-managed 82579 */
- if ((hw->mac.type == e1000_pch2lan) &&
- !(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) {
- msleep(10);
- e1000_gate_hw_phy_config_ich8lan(hw, false);
+ if (hw->mac.type == e1000_pch2lan) {
+ /* Ungate automatic PHY configuration on non-managed 82579 */
+ if (!(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) {
+ msleep(10);
+ e1000_gate_hw_phy_config_ich8lan(hw, false);
+ }
+
+ /* Set EEE LPI Update Timer to 200usec */
+ ret_val = hw->phy.ops.acquire(hw);
+ if (ret_val)
+ goto out;
+ ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR,
+ I82579_LPI_UPDATE_TIMER);
+ if (ret_val)
+ goto release;
+ ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_DATA,
+ 0x1387);
+release:
+ hw->phy.ops.release(hw);
}
out: