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| author | Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> | 2019-06-03 11:20:31 -0500 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-06-03 17:49:17 +0100 |
| commit | 09a173a63fbb89762712a4ec48722ba98d4e1bcc (patch) | |
| tree | 507593f356981fb9361594a0f0ee7a63285d51f3 /drivers/uwb/rsv.c | |
| parent | 66e65339b824a597a8c750ddf993af17c847dce6 (diff) | |
| download | linux-09a173a63fbb89762712a4ec48722ba98d4e1bcc.tar.bz2 | |
ASoC: SOF: Intel: ipc: don't check for HIPCCTL register value
The HIPCCTL register controls the IPC interrupts. It can be set or
cleared to mask or enable these interrupts, but it makes no sense to
read and test its fields in an interrupt (which can only executed if
its fields are set).
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/uwb/rsv.c')
0 files changed, 0 insertions, 0 deletions