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authorThierry Reding <treding@nvidia.com>2019-12-06 15:06:46 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-12-10 11:36:26 +0100
commitec12ac10c9a7e2f1edf15c488e54f4c813cf0f52 (patch)
tree23a4e046d009ae337512f4bf9b2335a832613813 /drivers/usb/host/xhci-tegra.c
parent741d6e5d84f30266694ca23641f1d028b55f7f40 (diff)
downloadlinux-ec12ac10c9a7e2f1edf15c488e54f4c813cf0f52.tar.bz2
usb: host: xhci-tegra: Avoid a fixed duration sleep
Do not use a fixed duration sleep to wait for the DMA controller to become ready. Instead, poll the L2IMEMOP_RESULT register for the VLD flag to determine when the XUSB controller's DMA master is ready. Based on work by JC Kuo <jckuo@nvidia.com>. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20191206140653.2085561-4-thierry.reding@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/xhci-tegra.c')
-rw-r--r--drivers/usb/host/xhci-tegra.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index 5cfd54862670..e80fce712fd5 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -11,6 +11,7 @@
#include <linux/dma-mapping.h>
#include <linux/firmware.h>
#include <linux/interrupt.h>
+#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
@@ -101,6 +102,8 @@
#define L2IMEMOP_ACTION_SHIFT 24
#define L2IMEMOP_INVALIDATE_ALL (0x40 << L2IMEMOP_ACTION_SHIFT)
#define L2IMEMOP_LOAD_LOCKED_RESULT (0x11 << L2IMEMOP_ACTION_SHIFT)
+#define XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT 0x101a18
+#define L2IMEMOP_RESULT_VLD BIT(31)
#define XUSB_CSB_MP_APMAP 0x10181c
#define APMAP_BOOTPATH BIT(31)
@@ -836,6 +839,7 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra)
struct tm time;
u64 address;
u32 value;
+ int err;
header = (struct tegra_xusb_fw_header *)tegra->fw.virt;
@@ -893,7 +897,16 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra)
csb_writel(tegra, 0, XUSB_FALC_DMACTL);
- msleep(50);
+ /* wait for RESULT_VLD to get set */
+#define tegra_csb_readl(offset) csb_readl(tegra, offset)
+ err = readx_poll_timeout(tegra_csb_readl,
+ XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT, value,
+ value & L2IMEMOP_RESULT_VLD, 100, 10000);
+ if (err < 0) {
+ dev_err(dev, "DMA controller not ready %#010x\n", value);
+ return err;
+ }
+#undef tegra_csb_readl
csb_writel(tegra, le32_to_cpu(header->boot_codetag),
XUSB_FALC_BOOTVEC);