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| author | Heikki Krogerus <heikki.krogerus@linux.intel.com> | 2015-05-13 15:26:43 +0300 |
|---|---|---|
| committer | Felipe Balbi <balbi@ti.com> | 2015-05-13 12:05:33 -0500 |
| commit | b5699eeee68f7667f200b05f57bcf8124ddba9fc (patch) | |
| tree | 80315411fafab6028039597ec893c98d97ac2932 /drivers/usb/dwc3/core.h | |
| parent | 289fcff4bcdb1dcc0ce8788b7ea0f58a9e4a495f (diff) | |
| download | linux-b5699eeee68f7667f200b05f57bcf8124ddba9fc.tar.bz2 | |
usb: dwc3: USB2 PHY register access bits
Definitions for Global USB2 PHY Vendor Control Register
bits. We will need them to access ULPI PHY registers later.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/dwc3/core.h')
| -rw-r--r-- | drivers/usb/dwc3/core.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index fdab715a0631..747805d9c5c3 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -174,6 +174,14 @@ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6) +/* Global USB2 PHY Vendor Control Register */ +#define DWC3_GUSB2PHYACC_NEWREGREQ (1 << 25) +#define DWC3_GUSB2PHYACC_BUSY (1 << 23) +#define DWC3_GUSB2PHYACC_WRITE (1 << 22) +#define DWC3_GUSB2PHYACC_ADDR(n) (n << 16) +#define DWC3_GUSB2PHYACC_EXTEND_ADDR(n) (n << 8) +#define DWC3_GUSB2PHYACC_DATA(n) (n & 0xff) + /* Global USB3 PIPE Control Register */ #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31) #define DWC3_GUSB3PIPECTL_U2SSINP3OK (1 << 29) |