diff options
| author | NeilBrown <neil@brown.name> | 2018-06-07 08:04:21 +1000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-06-17 09:05:11 +0200 |
| commit | 97738374a310b9116f9c33832737e517226d3722 (patch) | |
| tree | 12a59d1f16acd4bd6d4264b131d5b45e8687bb9e /drivers/staging/mt7621-dts/gbpc1.dts | |
| parent | bf732c6bff5b5767a1c2ec6495dccd76d71c05eb (diff) | |
| download | linux-97738374a310b9116f9c33832737e517226d3722.tar.bz2 | |
staging: mt7621-dts: correct various clock frequencies.
The MT7621 documentation says that the sys clock - also known
as OCP clock for the Open Core Protocol - can be configured to
1/3 or 1/4 of the CPU clock.
Testing on my hardware, using the fact that the SPI clock is
based on the OCP clock and measuring transfer rates, shows
a clock of a little over 200MHz with a CPU clock of 900MHz.
So assume 1/4 is the default.
Also, the nor-flash in the gbpc1 is documented as accepting 50MHz
for request requests, and higher for other requests. So set
maximum to 50MHz.
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/mt7621-dts/gbpc1.dts')
| -rw-r--r-- | drivers/staging/mt7621-dts/gbpc1.dts | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/staging/mt7621-dts/gbpc1.dts b/drivers/staging/mt7621-dts/gbpc1.dts index 6b13d85d9d34..47bcee51e016 100644 --- a/drivers/staging/mt7621-dts/gbpc1.dts +++ b/drivers/staging/mt7621-dts/gbpc1.dts @@ -74,7 +74,7 @@ #size-cells = <1>; compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <50000000>; partition@0 { label = "u-boot"; @@ -104,7 +104,8 @@ &sysclock { compatible = "fixed-clock"; - clock-frequency = <90000000>; + /* This is normally 1/4 of cpuclock */ + clock-frequency = <225000000>; }; &cpuclock { |