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author | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-04-30 09:49:43 +0200 |
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committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-05-20 12:32:19 +0200 |
commit | 9d4fa1a16b28b1d12b0378993d2d48f572a045d9 (patch) | |
tree | 6cdd2ed63ead500d7684755ed77657298fe29111 /drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h | |
parent | d8763340d2cb6262fb86424315a1f92cabc0e23c (diff) | |
download | linux-9d4fa1a16b28b1d12b0378993d2d48f572a045d9.tar.bz2 |
media: atomisp: cleanup directory hierarchy
This driver has very long directories without a good
reason (IMHO). Let's drop two directories from such hierarchy,
in order to simplify things a little bit and make the dir
output a bit more readable.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h')
-rw-r--r-- | drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h | 185 |
1 files changed, 185 insertions, 0 deletions
diff --git a/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h new file mode 100644 index 000000000000..0da2937b900e --- /dev/null +++ b/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/isp_public.h @@ -0,0 +1,185 @@ +/* + * Support for Intel Camera Imaging ISP subsystem. + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __ISP_PUBLIC_H_INCLUDED__ +#define __ISP_PUBLIC_H_INCLUDED__ + +#include <type_support.h> +#include "system_types.h" + +/*! Enable or disable the program complete irq signal of ISP[ID] + + \param ID[in] SP identifier + \param cnd[in] predicate + + \return none, if(cnd) enable(ISP[ID].irq) else disable(ISP[ID].irq) + */ +void cnd_isp_irq_enable( + const isp_ID_t ID, + const bool cnd); + +/*! Read the state of cell ISP[ID] + + \param ID[in] ISP identifier + \param state[out] isp state structure + \param stall[out] isp stall conditions + + \return none, state = ISP[ID].state, stall = ISP[ID].stall + */ +void isp_get_state( + const isp_ID_t ID, + isp_state_t *state, + isp_stall_t *stall); + +/*! Write to the status and control register of ISP[ID] + + \param ID[in] ISP identifier + \param reg[in] register index + \param value[in] The data to be written + + \return none, ISP[ID].sc[reg] = value + */ +STORAGE_CLASS_ISP_H void isp_ctrl_store( + const isp_ID_t ID, + const unsigned int reg, + const hrt_data value); + +/*! Read from the status and control register of ISP[ID] + + \param ID[in] ISP identifier + \param reg[in] register index + \param value[in] The data to be written + + \return ISP[ID].sc[reg] + */ +STORAGE_CLASS_ISP_H hrt_data isp_ctrl_load( + const isp_ID_t ID, + const unsigned int reg); + +/*! Get the status of a bitfield in the control register of ISP[ID] + + \param ID[in] ISP identifier + \param reg[in] register index + \param bit[in] The bit index to be checked + + \return (ISP[ID].sc[reg] & (1<<bit)) != 0 + */ +STORAGE_CLASS_ISP_H bool isp_ctrl_getbit( + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit); + +/*! Set a bitfield in the control register of ISP[ID] + + \param ID[in] ISP identifier + \param reg[in] register index + \param bit[in] The bit index to be set + + \return none, ISP[ID].sc[reg] |= (1<<bit) + */ +STORAGE_CLASS_ISP_H void isp_ctrl_setbit( + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit); + +/*! Clear a bitfield in the control register of ISP[ID] + + \param ID[in] ISP identifier + \param reg[in] register index + \param bit[in] The bit index to be set + + \return none, ISP[ID].sc[reg] &= ~(1<<bit) + */ +STORAGE_CLASS_ISP_H void isp_ctrl_clearbit( + const isp_ID_t ID, + const unsigned int reg, + const unsigned int bit); + +/*! Write to the DMEM of ISP[ID] + + \param ID[in] ISP identifier + \param addr[in] the address in DMEM + \param data[in] The data to be written + \param size[in] The size(in bytes) of the data to be written + + \return none, ISP[ID].dmem[addr...addr+size-1] = data + */ +STORAGE_CLASS_ISP_H void isp_dmem_store( + const isp_ID_t ID, + unsigned int addr, + const void *data, + const size_t size); + +/*! Read from the DMEM of ISP[ID] + + \param ID[in] ISP identifier + \param addr[in] the address in DMEM + \param data[in] The data to be read + \param size[in] The size(in bytes) of the data to be read + + \return none, data = ISP[ID].dmem[addr...addr+size-1] + */ +STORAGE_CLASS_ISP_H void isp_dmem_load( + const isp_ID_t ID, + const unsigned int addr, + void *data, + const size_t size); + +/*! Write a 32-bit datum to the DMEM of ISP[ID] + + \param ID[in] ISP identifier + \param addr[in] the address in DMEM + \param data[in] The data to be written + \param size[in] The size(in bytes) of the data to be written + + \return none, ISP[ID].dmem[addr] = data + */ +STORAGE_CLASS_ISP_H void isp_dmem_store_uint32( + const isp_ID_t ID, + unsigned int addr, + const uint32_t data); + +/*! Load a 32-bit datum from the DMEM of ISP[ID] + + \param ID[in] ISP identifier + \param addr[in] the address in DMEM + \param data[in] The data to be read + \param size[in] The size(in bytes) of the data to be read + + \return none, data = ISP[ID].dmem[addr] + */ +STORAGE_CLASS_ISP_H uint32_t isp_dmem_load_uint32( + const isp_ID_t ID, + const unsigned int addr); + +/*! Concatenate the LSW and MSW into a double precision word + + \param x0[in] Integer containing the LSW + \param x1[in] Integer containing the MSW + + \return x0 | (x1 << bits_per_vector_element) + */ +STORAGE_CLASS_ISP_H uint32_t isp_2w_cat_1w( + const u16 x0, + const uint16_t x1); + +unsigned int isp_is_ready(isp_ID_t ID); + +unsigned int isp_is_sleeping(isp_ID_t ID); + +void isp_start(isp_ID_t ID); + +void isp_wake(isp_ID_t ID); + +#endif /* __ISP_PUBLIC_H_INCLUDED__ */ |