diff options
author | Michael Tretter <m.tretter@pengutronix.de> | 2020-07-13 16:42:24 +0200 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-07-19 14:00:31 +0200 |
commit | d30e841216411cb95ffbb56252f8431fd752c54d (patch) | |
tree | d72f703d897fbf4745fca3b989d0819e4b644a48 /drivers/staging/media/allegro-dvt/allegro-mail.c | |
parent | 62ed97df7dc1bbb564fcd1c4f795aaa74245c63f (diff) | |
download | linux-d30e841216411cb95ffbb56252f8431fd752c54d.tar.bz2 |
media: allegro: encode bit fields separately
Even bits in bitfields do not keep their position, but move around or
move to other bitfields. Therefore, the driver has to handle bitfields
differently depending on the firmware version.
Create separate fields for the options that have been in bitfields and
handle the bitfields when encoding the message.
As a side effect, this makes the messages a bit more readable.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/staging/media/allegro-dvt/allegro-mail.c')
-rw-r--r-- | drivers/staging/media/allegro-dvt/allegro-mail.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/drivers/staging/media/allegro-dvt/allegro-mail.c b/drivers/staging/media/allegro-dvt/allegro-mail.c index ce183bd2495b..7121f128aff3 100644 --- a/drivers/staging/media/allegro-dvt/allegro-mail.c +++ b/drivers/staging/media/allegro-dvt/allegro-mail.c @@ -69,6 +69,7 @@ static ssize_t allegro_encode_channel_config(u32 *dst, struct create_channel_param *param) { unsigned int i = 0; + u32 val; unsigned int codec = settings_get_mcu_codec(param); dst[i++] = FIELD_PREP(GENMASK(31, 16), param->height) | @@ -81,9 +82,24 @@ allegro_encode_channel_config(u32 *dst, struct create_channel_param *param) FIELD_PREP(GENMASK(7, 0), param->profile); dst[i++] = FIELD_PREP(GENMASK(31, 16), param->tier) | FIELD_PREP(GENMASK(15, 0), param->level); - dst[i++] = param->sps_param; - dst[i++] = param->pps_param; - dst[i++] = param->enc_option; + + val = 0; + val |= param->temporal_mvp_enable ? BIT(20) : 0; + val |= FIELD_PREP(GENMASK(7, 4), param->log2_max_frame_num) | + FIELD_PREP(GENMASK(3, 0), param->log2_max_poc); + dst[i++] = val; + + val = 0; + val |= param->dbf_ovr_en ? BIT(2) : 0; + dst[i++] = val; + + val = 0; + val |= param->lf ? BIT(2) : 0; + val |= param->lf_x_tile ? BIT(3) : 0; + val |= param->lf_x_slice ? BIT(4) : 0; + val |= param->rdo_cost_mode ? BIT(20) : 0; + dst[i++] = val; + dst[i++] = FIELD_PREP(GENMASK(15, 8), param->beta_offset) | FIELD_PREP(GENMASK(7, 0), param->tc_offset); dst[i++] = param->unknown11; |