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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-01 11:42:38 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-06-01 11:42:38 -0700 |
commit | a36de5ebac2bea1d30e9ad103b4f841a2c4bb61b (patch) | |
tree | b6388ac948b5d87299e6584c9d250b0e887d11a4 /drivers/spi/spi-dw.h | |
parent | 213fd09e1aff05433d6855287808a235c9801c1b (diff) | |
parent | fb02b9eb4e335f8965badd1e6ee24fdc284cb395 (diff) | |
download | linux-a36de5ebac2bea1d30e9ad103b4f841a2c4bb61b.tar.bz2 |
Merge tag 'spi-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"This has been a very active release for the DesignWare driver in
particular - after a long period of inactivity we have had a lot of
people actively working on it for unrelated reasons this cycle with
some of that work still not landed.
Otherwise it's been fairly quiet for the subsystem.
Highlights include:
- Lots of performance improvements and fixes for the DesignWare
driver from Serge Semin, Andy Shevchenko, Wan Ahmad Zainie, Clement
Leger, Dinh Nguyen and Jarkko Nikula.
- Support for octal mode transfers in spidev.
- Slave mode support for the Rockchip drivers.
- Support for AMD controllers, Broadcom mspi and Raspberry Pi 4, and
Intel Elkhart Lake"
* tag 'spi-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (125 commits)
spi: spi-fsl-dspi: fix native data copy
spi: Convert DW SPI binding to DT schema
spi: dw: Refactor mid_spi_dma_setup() to separate DMA and IRQ config
spi: dw: Make DMA request line assignments explicit for Intel Medfield
spi: bcm2835: Remove shared interrupt support
dt-bindings: snps,dw-apb-ssi: add optional reset property
spi: dw: add reset control
spi: bcm2835: Enable shared interrupt support
spi: bcm2835: Implement shutdown callback
spi: dw: Use regset32 DebugFS method to create regdump file
spi: dw: Add DMA support to the DW SPI MMIO driver
spi: dw: Cleanup generic DW DMA code namings
spi: dw: Add DW SPI DMA/PCI/MMIO dependency on the DW SPI core
spi: dw: Remove DW DMA code dependency from DW_DMAC_PCI
spi: dw: Move Non-DMA code to the DW PCIe-SPI driver
spi: dw: Add core suffix to the DW APB SSI core source file
spi: dw: Fix Rx-only DMA transfers
spi: dw: Use DMA max burst to set the request thresholds
spi: dw: Parameterize the DMA Rx/Tx burst length
spi: dw: Add SPI Rx-done wait method to DMA-based transfer
...
Diffstat (limited to 'drivers/spi/spi-dw.h')
-rw-r--r-- | drivers/spi/spi-dw.h | 66 |
1 files changed, 41 insertions, 25 deletions
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 1bf5713e047d..151ba316619e 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -2,18 +2,21 @@ #ifndef DW_SPI_HEADER_H #define DW_SPI_HEADER_H +#include <linux/completion.h> +#include <linux/debugfs.h> +#include <linux/irqreturn.h> #include <linux/io.h> #include <linux/scatterlist.h> /* Register offsets */ -#define DW_SPI_CTRL0 0x00 -#define DW_SPI_CTRL1 0x04 +#define DW_SPI_CTRLR0 0x00 +#define DW_SPI_CTRLR1 0x04 #define DW_SPI_SSIENR 0x08 #define DW_SPI_MWCR 0x0c #define DW_SPI_SER 0x10 #define DW_SPI_BAUDR 0x14 -#define DW_SPI_TXFLTR 0x18 -#define DW_SPI_RXFLTR 0x1c +#define DW_SPI_TXFTLR 0x18 +#define DW_SPI_RXFTLR 0x1c #define DW_SPI_TXFLR 0x20 #define DW_SPI_RXFLR 0x24 #define DW_SPI_SR 0x28 @@ -57,6 +60,15 @@ #define SPI_SRL_OFFSET 11 #define SPI_CFS_OFFSET 12 +/* Bit fields in CTRLR0 based on DWC_ssi_databook.pdf v1.01a */ +#define DWC_SSI_CTRLR0_SRL_OFFSET 13 +#define DWC_SSI_CTRLR0_TMOD_OFFSET 10 +#define DWC_SSI_CTRLR0_TMOD_MASK GENMASK(11, 10) +#define DWC_SSI_CTRLR0_SCPOL_OFFSET 9 +#define DWC_SSI_CTRLR0_SCPH_OFFSET 8 +#define DWC_SSI_CTRLR0_FRF_OFFSET 6 +#define DWC_SSI_CTRLR0_DFS_OFFSET 0 + /* Bit fields in SR, 7 bits */ #define SR_MASK 0x7f /* cover 7 bits */ #define SR_BUSY (1 << 0) @@ -90,7 +102,7 @@ enum dw_ssi_type { struct dw_spi; struct dw_spi_dma_ops { - int (*dma_init)(struct dw_spi *dws); + int (*dma_init)(struct device *dev, struct dw_spi *dws); void (*dma_exit)(struct dw_spi *dws); int (*dma_setup)(struct dw_spi *dws, struct spi_transfer *xfer); bool (*can_dma)(struct spi_controller *master, struct spi_device *spi, @@ -114,6 +126,8 @@ struct dw_spi { u16 bus_num; u16 num_cs; /* supported slave numbers */ void (*set_cs)(struct spi_device *spi, bool enable); + u32 (*update_cr0)(struct spi_controller *master, struct spi_device *spi, + struct spi_transfer *transfer); /* Current message transfer state info */ size_t len; @@ -124,24 +138,22 @@ struct dw_spi { void *rx_end; int dma_mapped; u8 n_bytes; /* current is a 1/2 bytes op */ - u32 dma_width; irqreturn_t (*transfer_handler)(struct dw_spi *dws); u32 current_freq; /* frequency in hz */ /* DMA info */ - int dma_inited; struct dma_chan *txchan; + u32 txburst; struct dma_chan *rxchan; + u32 rxburst; unsigned long dma_chan_busy; dma_addr_t dma_addr; /* phy address of the Data register */ const struct dw_spi_dma_ops *dma_ops; - void *dma_tx; - void *dma_rx; + struct completion dma_completion; - /* Bus interface info */ - void *priv; #ifdef CONFIG_DEBUG_FS struct dentry *debugfs; + struct debugfs_regset32 regset; #endif }; @@ -235,24 +247,28 @@ static inline void spi_shutdown_chip(struct dw_spi *dws) spi_set_clk(dws, 0); } -/* - * Each SPI slave device to work with dw_api controller should - * has such a structure claiming its working mode (poll or PIO/DMA), - * which can be save in the "controller_data" member of the - * struct spi_device. - */ -struct dw_spi_chip { - u8 poll_mode; /* 1 for controller polling mode */ - u8 type; /* SPI/SSP/MicroWire */ - void (*cs_control)(u32 command); -}; - extern void dw_spi_set_cs(struct spi_device *spi, bool enable); extern int dw_spi_add_host(struct device *dev, struct dw_spi *dws); extern void dw_spi_remove_host(struct dw_spi *dws); extern int dw_spi_suspend_host(struct dw_spi *dws); extern int dw_spi_resume_host(struct dw_spi *dws); +extern u32 dw_spi_update_cr0(struct spi_controller *master, + struct spi_device *spi, + struct spi_transfer *transfer); +extern u32 dw_spi_update_cr0_v1_01a(struct spi_controller *master, + struct spi_device *spi, + struct spi_transfer *transfer); + +#ifdef CONFIG_SPI_DW_DMA + +extern void dw_spi_dma_setup_mfld(struct dw_spi *dws); +extern void dw_spi_dma_setup_generic(struct dw_spi *dws); + +#else + +static inline void dw_spi_dma_setup_mfld(struct dw_spi *dws) {} +static inline void dw_spi_dma_setup_generic(struct dw_spi *dws) {} + +#endif /* !CONFIG_SPI_DW_DMA */ -/* platform related setup */ -extern int dw_spi_mid_init(struct dw_spi *dws); /* Intel MID platforms */ #endif /* DW_SPI_HEADER_H */ |