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authorAndrew Vasquez <andrewv@marvell.com>2020-02-26 14:40:13 -0800
committerMartin K. Petersen <martin.petersen@oracle.com>2020-02-28 20:32:33 -0500
commitb0f18eee6fc1ee21c07abb55e9ccabc9ed9c09f0 (patch)
tree58163e7f37026ff80962aee942ffeea694c453ba /drivers/scsi/qla2xxx/qla_fw.h
parentce1ee122e0f048fc67c1259489f0802a28049bfd (diff)
downloadlinux-b0f18eee6fc1ee21c07abb55e9ccabc9ed9c09f0.tar.bz2
scsi: qla2xxx: Update BPM enablement semantics.
commit e4e3a2ce9556 ("scsi: qla2xxx: Add ability to autodetect SFP type") takes a heavy handed approach to BPM (Buffer Plus Management) enablement: 1) During hardware initialization, if an LR-capable transceiver is recognized, the driver schedules a disruptive post-initialization chip-reset (ISP-ABORT) to allow the BPM settings to be sent to the firmware. This chip-reset will result in (short-term) path-loss to all fc-rports and their attached SCSI devices. 2) LR-detection is triggered during any link-up event, resulting in a refresh and potential chip-reset Based on firmware-team guidance, upon LR-capable transceiver recognition, the driver's hardware initialization code will now re-execute firmware with the new BPM settings, then continue on with driver initialization. To address the second issue, the driver performs LR-capable detection upon the driver receiving a transceiver-insertion asynchronous event from firmware. No short-term path loss is needed with this new semantic. Link: https://lore.kernel.org/r/20200226224022.24518-10-hmadhani@marvell.com Signed-off-by: Himanshu Madhani <hmadhani@marvell.com> Signed-off-by: Andrew Vasquez <andrewv@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_fw.h')
-rw-r--r--drivers/scsi/qla2xxx/qla_fw.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h
index 8af5bc4e2cc6..f9bad5bd7198 100644
--- a/drivers/scsi/qla2xxx/qla_fw.h
+++ b/drivers/scsi/qla2xxx/qla_fw.h
@@ -1867,9 +1867,8 @@ struct access_chip_rsp_84xx {
/* LR Distance bit positions */
#define LR_DIST_NV_POS 2
+#define LR_DIST_NV_MASK 0xf
#define LR_DIST_FW_POS 12
-#define LR_DIST_FW_SHIFT (LR_DIST_FW_POS - LR_DIST_NV_POS)
-#define LR_DIST_FW_FIELD(x) ((x) << LR_DIST_FW_SHIFT & 0xf000)
/* FAC semaphore defines */
#define FAC_SEMAPHORE_UNLOCK 0