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| author | Michael Chan <michael.chan@broadcom.com> | 2018-01-17 03:21:15 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-01-17 14:48:27 -0500 |
| commit | c3480a603773cfc5d8aa44dbbee6c96e0f9d4d9d (patch) | |
| tree | d0814e265b4ba099bf7fdd43e26da5acda882054 /drivers/reset | |
| parent | 91cdda40714178497cbd182261b2ea6ec5cb9276 (diff) | |
| download | linux-c3480a603773cfc5d8aa44dbbee6c96e0f9d4d9d.tar.bz2 | |
bnxt_en: Add cache line size setting to optimize performance.
The chip supports 64-byte and 128-byte cache line size for more optimal
DMA performance when matched to the CPU cache line size. The default is 64.
If the system is using 128-byte cache line size, set it to 128.
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/reset')
0 files changed, 0 insertions, 0 deletions